KR870007567A - 반도체장치의 제조방법 - Google Patents
반도체장치의 제조방법 Download PDFInfo
- Publication number
- KR870007567A KR870007567A KR870000198A KR870000198A KR870007567A KR 870007567 A KR870007567 A KR 870007567A KR 870000198 A KR870000198 A KR 870000198A KR 870000198 A KR870000198 A KR 870000198A KR 870007567 A KR870007567 A KR 870007567A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor device
- manufacturing
- protective film
- silicon nitride
- bias sputtering
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000004519 manufacturing process Methods 0.000 title claims 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 229910000838 Al alloy Inorganic materials 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 230000001681 protective effect Effects 0.000 claims 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 239000007789 gas Substances 0.000 claims 2
- 229910052786 argon Inorganic materials 0.000 claims 1
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 238000007796 conventional method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Optics & Photonics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명의 제 1 실시예에 따른 방법으로 제조된 반도체 장치의 단면도,
제 2 도는 본 발명의 제 2 실시예에 따른 방법으로 제조된 반도체 장치의 단면도,
제 3 도는 종래의 방법으로 제조된 반도체장치의 단면도이다.
* 도면의 주요부분에 대한 부호의 설명
1 : 반도체기판
2 : 알루미늄합금으로 이루어진 백선층
3 : 바이어스 스퍼터법에 의해 형성된 질화실리콘막
4 : 통상의 스퍼터법에 의해 형성된 질화실리콘막
5 : 플라즈마법에 의해 형성된 질화실리콘막.
Claims (4)
- 반도체기판상에 형성된 배전증상에다 질화실리콘으로 된 보호막을 형성시켜 주는 방법에 있어서,최소한 상기 보호막의 일부를 바이어스 스퍼터법으로 퇴적 형성시켜 주도록 된 것을 특징으로 하는 반도체장치의 제조방법.
- 제 1 항에 있어서, 배선층이 알루미늄합금으로 된 것을 특징으로 하는 반도체장치의 제조방법.
- 제 1 항에 있어서, 보호막이 반도체장치의 가장 바깥층으로 된 것을 특징으로 하는 반도체장치의 제조방법.
- 제 1 항 내지 제 3 항중 어느 한 항에 있어서, 바이어스 스퍼터법이 질화실리콘을 목표체로 하고, 아르곤(Ar)과 질소의 혼합가스를 스퍼터가스로 써서 이루어지도록 된 것을 특징으로 하는 반도체장치의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61-9089 | 1986-01-20 | ||
JP61009089A JPS62166530A (ja) | 1986-01-20 | 1986-01-20 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870007567A true KR870007567A (ko) | 1987-08-20 |
KR900003617B1 KR900003617B1 (ko) | 1990-05-26 |
Family
ID=11710889
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870000198A KR900003617B1 (ko) | 1986-01-20 | 1987-01-13 | 반도체장치의 제조방법 |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0230953A3 (ko) |
JP (1) | JPS62166530A (ko) |
KR (1) | KR900003617B1 (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2550337B2 (ja) * | 1987-03-03 | 1996-11-06 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3010824B2 (ja) * | 1991-09-17 | 2000-02-21 | 株式会社日立製作所 | 半導体装置及びその製造方法 |
US7758982B2 (en) | 2005-09-02 | 2010-07-20 | Hitachi Global Storage Technologies Netherlands B.V. | SiN overcoat for perpendicular magnetic recording media |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57104224A (en) * | 1980-12-22 | 1982-06-29 | Hitachi Ltd | Forming method of insulating thin film |
JPS57152132A (en) * | 1981-03-13 | 1982-09-20 | Fujitsu Ltd | Chemical vapor growing method |
JPS60183751A (ja) * | 1984-03-02 | 1985-09-19 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置 |
-
1986
- 1986-01-20 JP JP61009089A patent/JPS62166530A/ja active Pending
-
1987
- 1987-01-13 KR KR1019870000198A patent/KR900003617B1/ko not_active IP Right Cessation
- 1987-01-20 EP EP87100658A patent/EP0230953A3/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JPS62166530A (ja) | 1987-07-23 |
KR900003617B1 (ko) | 1990-05-26 |
EP0230953A2 (en) | 1987-08-05 |
EP0230953A3 (en) | 1988-09-21 |
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