KR950009926A - 반도체 소자의 금속배선 형성방법 - Google Patents

반도체 소자의 금속배선 형성방법 Download PDF

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Publication number
KR950009926A
KR950009926A KR1019930018527A KR930018527A KR950009926A KR 950009926 A KR950009926 A KR 950009926A KR 1019930018527 A KR1019930018527 A KR 1019930018527A KR 930018527 A KR930018527 A KR 930018527A KR 950009926 A KR950009926 A KR 950009926A
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South Korea
Prior art keywords
metal thin
thin film
thin films
metal
metal wiring
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KR1019930018527A
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English (en)
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KR960016231B1 (en
Inventor
조경수
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR93018527A priority Critical patent/KR960016231B1/ko
Priority to US08/305,307 priority patent/US5573978A/en
Priority to JP6221491A priority patent/JP2773072B2/ja
Publication of KR950009926A publication Critical patent/KR950009926A/ko
Application granted granted Critical
Publication of KR960016231B1 publication Critical patent/KR960016231B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

본 발명은 반도체 소자의 금속배선 형성방법을 기술한 것으로, 반도체 제조 공정중에 형성되는 콘택홀 또는 비아홀을 화학 기상 증착법을 이용하여 금속박막을 다단계로 적층, 매립하여 금속배선을 형성할 수 있도록 한 반도체 소자의 금속배선 형성방법에 관하여 기술된다.

Description

반도체 소자의 금속배선 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1a도 내지 제1e도는 본 발명에 의한 반도체 소자의 금속배선을 형성하는 단계를 도시한 단면도.

Claims (4)

  1. 반도체 소자의 금속배선 형성방법에 있어서, 실리콘 기판(11) 상의 산화막(3)을 소정의 폭으로 패턴화하여 상기 실리콘 기판(11) 상에 형성된 접합부(2)와 연통되도록 콘택홀(11)을 형성하고 상기 산화막(3) 상부 및 콘택홀(11)에 제1 내지 제4금속박막(4 내지 7)을 다단계로 증착하는 단계와, 상기 단계로부터 상기 산화막 및 콘택홀(3 및 11) 상부의 상기 제1 내지 제4금속박막(4 내지 7)을 제거하는 단계와, 상기 단계로부터 상기 산화막 및 콘택홀(3 및 11) 상부에 제5 내지 제7금속박막(8 내지 10)을 순차적으로 증착하는 단계와, 상기 단계로부터 금속 배선이 형성될 부분을 제외한 나머지 제5 내지 제7금속박막(8 내지 10)을 제거하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 금속배선 형성방법.
  2. 제1항에 있어서, 상기 제2 내지 제4금속박막(5 내지 7)은 각각의 금속박막 증착시 대기중에 노출시키는 것을 특징으로 하는 반도체 소자의 금속배선 형성방법.
  3. 제1항에 있어서, 상기 제2 내지 제4금속박막(5 내지 7)은 각각의 금속박막 증착시 어닐링 공정을 실시하는 것을 특징으로 하는 반도체 소자의 금속배선 형성방법.
  4. 제1항에 있어서, 상기 제1금속박막(4)은 티타늄을 사용하고, 제2 내지 제4금속박막(5 내지 7)과 제7금속박막(10)은 티타늄 나이트라이드 박막을 사용하며, 제5금속박막(8)은 티타늄이 함유된 텅스텐(TiW) 박막 또는 티타늄 나이트라이드 박막이 사용되고, 제6금속박막(9)은 알루미늄 합금박막을 사용하는 것을 특징으로 하는 반도체 소자의 금속배선 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR93018527A 1993-09-15 1993-09-15 Semiconductor metal wire forming method KR960016231B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR93018527A KR960016231B1 (en) 1993-09-15 1993-09-15 Semiconductor metal wire forming method
US08/305,307 US5573978A (en) 1993-09-15 1994-09-15 Method of forming a metal wire in a semiconductor device
JP6221491A JP2773072B2 (ja) 1993-09-15 1994-09-16 半導体素子の金属配線の形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93018527A KR960016231B1 (en) 1993-09-15 1993-09-15 Semiconductor metal wire forming method

Publications (2)

Publication Number Publication Date
KR950009926A true KR950009926A (ko) 1995-04-26
KR960016231B1 KR960016231B1 (en) 1996-12-07

Family

ID=19363559

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93018527A KR960016231B1 (en) 1993-09-15 1993-09-15 Semiconductor metal wire forming method

Country Status (3)

Country Link
US (1) US5573978A (ko)
JP (1) JP2773072B2 (ko)
KR (1) KR960016231B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100430682B1 (ko) * 1996-12-31 2004-07-12 주식회사 하이닉스반도체 반도체소자의금속배선형성방법

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* Cited by examiner, † Cited by third party
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KR950012738B1 (ko) * 1992-12-10 1995-10-20 현대전자산업주식회사 반도체소자의 텅스텐 콘택 플러그 제조방법
KR970011972A (ko) * 1995-08-11 1997-03-29 쯔지 하루오 투과형 액정 표시 장치 및 그 제조 방법
KR100220935B1 (ko) * 1995-12-15 1999-09-15 김영환 메탈 콘택 형성방법
JPH10125627A (ja) * 1996-10-24 1998-05-15 Fujitsu Ltd 半導体装置の製造方法および高融点金属ナイトライド膜の形成方法
US6107190A (en) * 1997-01-30 2000-08-22 Nec Corporation Method of fabricating semiconductor device
US6037252A (en) * 1997-11-05 2000-03-14 Tokyo Electron Limited Method of titanium nitride contact plug formation
JP3625652B2 (ja) * 1998-06-30 2005-03-02 シャープ株式会社 半導体装置の製造方法
KR100331545B1 (ko) * 1998-07-22 2002-04-06 윤종용 다단계 화학 기상 증착 방법에 의한 다층 질화티타늄막 형성방법및 이를 이용한 반도체 소자의 제조방법
CN100349803C (zh) * 2006-04-04 2007-11-21 北京大学 氧化钨微米管及其制备方法
JP2010165989A (ja) * 2009-01-19 2010-07-29 Elpida Memory Inc 半導体装置の製造方法

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US4783248A (en) * 1987-02-10 1988-11-08 Siemens Aktiengesellschaft Method for the production of a titanium/titanium nitride double layer
JPH02105411A (ja) * 1988-10-13 1990-04-18 Nec Corp 半導体装置
US5162262A (en) * 1989-03-14 1992-11-10 Mitsubishi Denki Kabushiki Kaisha Multi-layered interconnection structure for a semiconductor device and manufactured method thereof
US4983250A (en) * 1989-06-16 1991-01-08 Microelectronics And Computer Technology Method of laser patterning an electrical interconnect
US5231052A (en) * 1991-02-14 1993-07-27 Industrial Technology Research Institute Process for forming a multilayer polysilicon semiconductor electrode
JPH053254A (ja) * 1991-06-24 1993-01-08 Sony Corp 積層配線形成方法
JPH0529316A (ja) * 1991-07-23 1993-02-05 Nec Corp 半導体装置の製造方法
JPH05251567A (ja) * 1992-03-09 1993-09-28 Nec Corp 半導体装置
JP3003422B2 (ja) * 1992-10-01 2000-01-31 日本電気株式会社 半導体装置の製造方法
US5378660A (en) * 1993-02-12 1995-01-03 Applied Materials, Inc. Barrier layers and aluminum contacts

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100430682B1 (ko) * 1996-12-31 2004-07-12 주식회사 하이닉스반도체 반도체소자의금속배선형성방법

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Publication number Publication date
KR960016231B1 (en) 1996-12-07
JPH07221181A (ja) 1995-08-18
JP2773072B2 (ja) 1998-07-09
US5573978A (en) 1996-11-12

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