KR940020531A - 콘택홀에 금속플러그 제조방법 - Google Patents

콘택홀에 금속플러그 제조방법 Download PDF

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Publication number
KR940020531A
KR940020531A KR1019930002151A KR930002151A KR940020531A KR 940020531 A KR940020531 A KR 940020531A KR 1019930002151 A KR1019930002151 A KR 1019930002151A KR 930002151 A KR930002151 A KR 930002151A KR 940020531 A KR940020531 A KR 940020531A
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South Korea
Prior art keywords
metal
contact hole
layer
manufacturing
polysilicon layer
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KR1019930002151A
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English (en)
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KR960004095B1 (en
Inventor
최경근
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김주용
현대전자산업 주식회사
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Priority to KR93002151A priority Critical patent/KR960004095B1/ko
Priority to US08/194,843 priority patent/US5427981A/en
Priority to JP6020503A priority patent/JP2524091B2/ja
Publication of KR940020531A publication Critical patent/KR940020531A/ko
Application granted granted Critical
Publication of KR960004095B1 publication Critical patent/KR960004095B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76865—Selective removal of parts of the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 고집적 반도체 소자의 콘택홀에 텅스텐 플러그 제조방법에 관한 것으로, 특히 콘택홀 저면의 실리콘 기판상에 금속 실리사이드막을 형성할 때 금속층의 층덮힘의 불량으로 인해 모서리 부분에서 노출되어 후공정의 선택텅스텐 플러그 형성시 텅스텐막이 균일하게 증착되지 않는 것을 방지하는 기술에 관한 것이다.

Description

콘택홀에 금속플러그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A도 내지 제2F도는 본 발명에 의해 콘택홀에 금속플러그를 형성하는 단계를 도시한 단면도.

Claims (3)

  1. 반도체 소자의 콘택홀에 금속 실리사이드 및 금속플러그 제조방법에 있어서, 실리콘기판 상부에 절연층을 형성하고, 소정부분의 절연층을 식각하여 콘택홀을 형성한 다음, 전체구조 상부에 폴리실리콘층을 예정된 두께 증착하는 공정과, 상기 폴리실리콘층 상부에 감광막을 도포하고, 에치백 공정으로 감광막을 식각하되 콘택홀 저부에 감광막의 일정두께는 남도록 하는 공정과, 노출된 폴리실리콘층을 식각하고, 남아있는 감광막을 완전히 제거하여 콘택홀 저부면에 폴리실리콘층이 노출되도록 하는 공정과, 전체구조 상부에 금속층을 증착하고 어닐링 공정으로 금속층과 폴리실리콘층이 반응되게 하여 금속 실리사이드막을 형성하는 공정과, 남아있는 금속층을 식각하고, 선택적 금속을 증착하여 콘택홀에 금속플러그를 형성하는 공정을 포함하는 것을 특징으로 하는 콘택홀에 금속플러그 제조방법.
  2. 제1항에 있어서, 상기 금속 실리사이드막의 금속은 티타늄, 코발트, 몰리브덴 또는 망간으로 형성하는 것을 특징으로 하는 콘택홀에 금속플러그 제조방법.
  3. 제1항에 있어서, 상기 선택적 금속은 텅스텐, 알루미늄 또는 구리로 증착하는 것을 특징으로 하는 콘택홀에 금속플러그 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR93002151A 1993-02-17 1993-02-17 Manufacturing method of metal plug in contact-hole KR960004095B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR93002151A KR960004095B1 (en) 1993-02-17 1993-02-17 Manufacturing method of metal plug in contact-hole
US08/194,843 US5427981A (en) 1993-02-17 1994-02-14 Process for fabricating metal plus using metal silicide film
JP6020503A JP2524091B2 (ja) 1993-02-17 1994-02-17 金属プラグ製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93002151A KR960004095B1 (en) 1993-02-17 1993-02-17 Manufacturing method of metal plug in contact-hole

Publications (2)

Publication Number Publication Date
KR940020531A true KR940020531A (ko) 1994-09-16
KR960004095B1 KR960004095B1 (en) 1996-03-26

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KR93002151A KR960004095B1 (en) 1993-02-17 1993-02-17 Manufacturing method of metal plug in contact-hole

Country Status (3)

Country Link
US (1) US5427981A (ko)
JP (1) JP2524091B2 (ko)
KR (1) KR960004095B1 (ko)

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KR100323719B1 (ko) * 1999-12-28 2002-02-19 박종섭 반도체소자의 금속배선 및 그 제조방법

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JPH07130852A (ja) * 1993-11-02 1995-05-19 Sony Corp 金属配線材料の形成方法
US5645887A (en) * 1994-01-14 1997-07-08 Lg Semicon Co., Ltd. Method for forming platinum silicide plugs
US5633189A (en) * 1994-08-01 1997-05-27 Actel Corporation Method of making metal to metal antifuse
US5484747A (en) * 1995-05-25 1996-01-16 United Microelectronics Corporation Selective metal wiring and plug process
US5504038A (en) * 1995-05-25 1996-04-02 United Microelectronics Corporation Method for selective tungsten sidewall and bottom contact formation
JPH08335641A (ja) * 1995-06-06 1996-12-17 Texas Instr Inc <Ti> チタン・ポリサイドｃｍｏｓ回路にオーミック・コンタクトを設ける方法及びそのオーミック・コンタクトを有する集積回路
JPH09139429A (ja) * 1995-11-10 1997-05-27 Nippon Steel Corp 半導体装置の製造方法
US5693562A (en) * 1996-06-28 1997-12-02 Vanguard International Semiconductor Corporation Method for forming a barrier metal film with conformal step coverage in a semiconductor integrated circuit
US5904561A (en) * 1996-06-28 1999-05-18 Vanguard International Semiconductor Corporation Method for forming a barrier metal film with conformal step coverage in a semiconductor intergrated circuit
JP3228181B2 (ja) 1997-05-12 2001-11-12 ヤマハ株式会社 平坦配線形成法
US5899741A (en) * 1998-03-18 1999-05-04 Taiwan Semiconductor Manufacturing Company Ltd. Method of manufacturing low resistance and low junction leakage contact
US6194315B1 (en) 1999-04-16 2001-02-27 Micron Technology, Inc. Electrochemical cobalt silicide liner for metal contact fills and damascene processes
JP2005203476A (ja) 2004-01-14 2005-07-28 Oki Electric Ind Co Ltd 半導体装置の配線構造及びその製造方法
JP4478038B2 (ja) 2004-02-27 2010-06-09 株式会社半導体理工学研究センター 半導体装置及びその製造方法
CN100346454C (zh) * 2004-04-22 2007-10-31 复旦大学 一种硅基器件的金属化接触层结构的制备方法
KR100603588B1 (ko) * 2004-06-09 2006-07-24 주식회사 하이닉스반도체 낮은 콘택 저항을 갖는 반도체 소자 및 그 제조 방법
US7790611B2 (en) * 2007-05-17 2010-09-07 International Business Machines Corporation Method for FEOL and BEOL wiring
WO2017111820A1 (en) * 2015-12-26 2017-06-29 Intel Corporation Reduced height liner for interconnects
US10366918B2 (en) * 2016-10-04 2019-07-30 International Business Machines Corporation Self-aligned trench metal-alloying for III-V nFETs

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US4818723A (en) * 1985-11-27 1989-04-04 Advanced Micro Devices, Inc. Silicide contact plug formation technique
US5084413A (en) * 1986-04-15 1992-01-28 Matsushita Electric Industrial Co., Ltd. Method for filling contact hole
US5196373A (en) * 1990-08-06 1993-03-23 Harris Corporation Method of making trench conductor and crossunder architecture
US5262354A (en) * 1992-02-26 1993-11-16 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100323719B1 (ko) * 1999-12-28 2002-02-19 박종섭 반도체소자의 금속배선 및 그 제조방법

Also Published As

Publication number Publication date
US5427981A (en) 1995-06-27
KR960004095B1 (en) 1996-03-26
JPH06310609A (ja) 1994-11-04
JP2524091B2 (ja) 1996-08-14

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