KR890012363A - 반도체 소자 제조방법 - Google Patents

반도체 소자 제조방법 Download PDF

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Publication number
KR890012363A
KR890012363A KR1019890000786A KR890000786A KR890012363A KR 890012363 A KR890012363 A KR 890012363A KR 1019890000786 A KR1019890000786 A KR 1019890000786A KR 890000786 A KR890000786 A KR 890000786A KR 890012363 A KR890012363 A KR 890012363A
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KR
South Korea
Prior art keywords
tungsten
hexafluoride
hydrogen
layer
tungsten layer
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Application number
KR1019890000786A
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English (en)
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KR0144737B1 (ko
Inventor
엘리자베스 요세프 슈미츠 요하네스
요하네스 마리아 반 디예크 안토니우스
크레이그 엘왠저 러쎌
Original Assignee
이반 밀러 레르너
엔.브이.필립스 글로아이람펜파브리켄
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Publication of KR890012363A publication Critical patent/KR890012363A/ko
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Publication of KR0144737B1 publication Critical patent/KR0144737B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051Deposition of metallic or metal-silicide layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53257Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

내용 없음.

Description

반도체 소자 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 내지 3도는 본 발명에 따른 방법에 의한 연속적인 제조단계를 도시하는 반도체 소자의 부분 단면도.

Claims (6)

  1. 수소를 가하여 텅스텐 헥사 플로라이드를 환원시킴으로서 기판 표면상에 텅스텐층이 제공되는 반도체 소자의 제조방법에 있어서, 수소를 가하여 텅스텐 헥사 플로라이드를 환원시킴으로서 텅스텐층이 제공되기 이전에, 가스상태로 실레인을 가하여 텅스텐 헥사 플로라이드를 환원시킴으로서 텅스텐층이 제공되며 가스 상태로 공급되는 실레인이 몰분율은 텅스텐 헥사 플로라이드 및 소멸되는 수소의 몰분율보다 적은 것을 특징으로 하는 반도체 소자 제조방법.
  2. 제1항에 있어서, 텅스텐층은 실리콘, 알루미늄 또는 티타늄-텅스텐상에 제공되는 것을 특징으로 하는 반도체 소자 제조방법.
  3. 제1항 또는 제2항에 있어서, 텅스텐층은 직경이 1.2㎛보다 작고 깊이가 0.3㎛보다 큰 실리콘 산화물층내의 개구에 제공되는 것을 특징으로 하는 반도체 소자 제조방법.
  4. 제3항에 있어서, 개구의 직경은 약 1㎛이고 깊이는 약 0.8㎛인 것을 특징으로 하는 반도체 소자 제조방법.
  5. 선행항중 어느 한 항에 있어서, 실레인 및 수소를 가하여 텅스텐 헥사 플로라이드를 환원시킴으로서 연속적으로 형성되는 텅스텐층의 두께는 각각 0.3㎛ 및 0.6㎛인 것을 특징으로 하는 반도체 소자 제조방법.
  6. 선행항중 어느 한 항에 있어서, 텅스텐층은 450℃이하의 온도에서 제공되는 것을 특징으로 하는 반도체 소자 제조방법.
    ※참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890000786A 1988-01-29 1989-01-26 반도체 장치 제조방법 KR0144737B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8800221A NL8800221A (nl) 1988-01-29 1988-01-29 Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
NL8800221 1988-01-29

Publications (2)

Publication Number Publication Date
KR890012363A true KR890012363A (ko) 1989-08-26
KR0144737B1 KR0144737B1 (ko) 1998-08-17

Family

ID=19851679

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890000786A KR0144737B1 (ko) 1988-01-29 1989-01-26 반도체 장치 제조방법

Country Status (6)

Country Link
US (1) US4892843A (ko)
EP (1) EP0326217B1 (ko)
JP (1) JP2578192B2 (ko)
KR (1) KR0144737B1 (ko)
DE (1) DE68906034T2 (ko)
NL (1) NL8800221A (ko)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02141569A (ja) * 1988-11-24 1990-05-30 Hitachi Ltd 超伝導材料
US5084417A (en) * 1989-01-06 1992-01-28 International Business Machines Corporation Method for selective deposition of refractory metals on silicon substrates and device formed thereby
US5202287A (en) * 1989-01-06 1993-04-13 International Business Machines Corporation Method for a two step selective deposition of refractory metals utilizing SiH4 reduction and H2 reduction
US5023205A (en) * 1989-04-27 1991-06-11 Polycon Method of fabricating hybrid circuit structures
US5028565A (en) * 1989-08-25 1991-07-02 Applied Materials, Inc. Process for CVD deposition of tungsten layer on semiconductor wafer
US5041394A (en) * 1989-09-11 1991-08-20 Texas Instruments Incorporated Method for forming protective barrier on silicided regions
JPH03223462A (ja) * 1990-01-27 1991-10-02 Fujitsu Ltd タングステン膜の形成方法
KR930002673B1 (ko) * 1990-07-05 1993-04-07 삼성전자 주식회사 고융점금속 성장방법
US5189506A (en) * 1990-06-29 1993-02-23 International Business Machines Corporation Triple self-aligned metallurgy for semiconductor devices
JPH04280436A (ja) * 1990-09-28 1992-10-06 Motorola Inc 相補型自己整合hfetの製造方法
EP0491433A3 (en) * 1990-12-19 1992-09-02 N.V. Philips' Gloeilampenfabrieken Method of forming conductive region on silicon semiconductor material, and silicon semiconductor device with such region
US5474949A (en) * 1992-01-27 1995-12-12 Matsushita Electric Industrial Co., Ltd. Method of fabricating capacitor or contact for semiconductor device by forming uneven oxide film and reacting silicon with metal containing gas
US5342652A (en) * 1992-06-15 1994-08-30 Materials Research Corporation Method of nucleating tungsten on titanium nitride by CVD without silane
JP2737764B2 (ja) * 1995-03-03 1998-04-08 日本電気株式会社 半導体装置及びその製造方法
KR100272523B1 (ko) 1998-01-26 2000-12-01 김영환 반도체소자의배선형성방법
US6103614A (en) * 1998-09-02 2000-08-15 The Board Of Trustees Of The University Of Illinois Hydrogen ambient process for low contact resistivity PdGe contacts to III-V materials
US6274494B1 (en) * 1998-12-16 2001-08-14 United Microelectronics Corp. Method of protecting gate oxide
US6387445B1 (en) * 1999-01-13 2002-05-14 Tokyo Electron Limited Tungsten layer forming method and laminate structure of tungsten layer

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60115245A (ja) * 1983-11-28 1985-06-21 Toshiba Corp 半導体装置の製造方法
US4629635A (en) * 1984-03-16 1986-12-16 Genus, Inc. Process for depositing a low resistivity tungsten silicon composite film on a substrate
JPS615580A (ja) * 1984-06-19 1986-01-11 Toshiba Corp 半導体装置の製造方法
DE3665961D1 (en) * 1985-07-29 1989-11-02 Siemens Ag Process for selectively filling contact holes made by etching in insulating layers with electrically conductive materials for the manufacture of high-density integrated semiconductor circuits, and apparatus used for this process
US4617087A (en) * 1985-09-27 1986-10-14 International Business Machines Corporation Method for differential selective deposition of metal for fabricating metal contacts in integrated semiconductor circuits
JPS62216224A (ja) * 1986-03-17 1987-09-22 Fujitsu Ltd タングステンの選択成長方法
JP2627756B2 (ja) * 1987-12-17 1997-07-09 富士通株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
KR0144737B1 (ko) 1998-08-17
DE68906034T2 (de) 1993-10-21
DE68906034D1 (de) 1993-05-27
NL8800221A (nl) 1989-08-16
JPH024971A (ja) 1990-01-09
EP0326217B1 (en) 1993-04-21
EP0326217A1 (en) 1989-08-02
US4892843A (en) 1990-01-09
JP2578192B2 (ja) 1997-02-05

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