KR890007386A - 반도체 장치 및 그 제조방법 - Google Patents

반도체 장치 및 그 제조방법 Download PDF

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Publication number
KR890007386A
KR890007386A KR1019880012647A KR880012647A KR890007386A KR 890007386 A KR890007386 A KR 890007386A KR 1019880012647 A KR1019880012647 A KR 1019880012647A KR 880012647 A KR880012647 A KR 880012647A KR 890007386 A KR890007386 A KR 890007386A
Authority
KR
South Korea
Prior art keywords
wiring
semiconductor
wirings
insulating film
interlayer insulating
Prior art date
Application number
KR1019880012647A
Other languages
English (en)
Other versions
KR920001174B1 (ko
Inventor
가츠야 오쿠무라
도시아키 이다카
리이치로 아오키
도시노리 신기
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP62249329A priority Critical patent/JPH0719841B2/ja
Priority to JP87-249329 priority
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR890007386A publication Critical patent/KR890007386A/ko
Application granted granted Critical
Publication of KR920001174B1 publication Critical patent/KR920001174B1/ko

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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/915Active solid-state devices, e.g. transistors, solid-state diodes with titanium nitride portion or region

Abstract

내용 없음

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1a도 내지 제1c도는 본 발명의 1실시예에 관한 반도체 장치의 제조방법을 도시해 놓은 제조공정도.
제2a도 내지 제2c도는 본 발명의 다른 실시예에 관한 반도체장치의 제조방법을 도시해 놓은 제조공정도.
* 도면의 주요부분에 대한 부호의 설명
11 : 반도체 기판 12 : 제1Al배선
13 : 층간절연막 14 : 제2Al배선
15 : 접속구멍 16 : 알루미나층
17 : Ti막 17A : TiN막
18,18A : 합금층

Claims (2)

  1. 제1배선(12)상에 층간절연막(13)을 매개로 제2배선(14)이 형성되면서 이들 제1 및 제2배선(12)(14)이 상기층간절연막(13)에 뚫려진 접속구멍(15)을 통해 도통시켜지도록 된 반도체장치에 있어서, 상기 제1 및 제2배선(12)(14)사이에 이들 배선을 도통시키기 위한 상기 제1배선(12)상의 고저항산화층(16)이 고산화성금속(17;17,17A)에 의해 환원시켜진 도통금속층(18;18A)으로 이루어진 것을 특징으로 하는 반도체 장치.
  2. 제1배선(12)상에 층간절연막(13)을 매개로 제2배선(14)이 형성되면서 이들 제1 및 제2배선(12)(14)이 상기 층간절연막(13)에 뚫려진 접속구멍(15)을 통해 도통시켜지도록된 반도체장치를 제조하는 방법에 있어서, 상기 제1배선(12)의 표면중 상기 접속구멍(15)에 노출되는 고저항산화층(16)을 갖는 부분에 고산화성금속(17;17,17A)을 퇴적시키는 공정과, 상기 고저항산화층(16)을 상기 고산화성금속(17;17,17A)에 의해 환원시켜 줌으로 도통금속층(18;18A)을 형성시키는 공정을 구비해서 이루어진 것을 특징으로 하는 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880012647A 1987-10-02 1988-09-29 반도체장치 및 그 제조방법 KR920001174B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62249329A JPH0719841B2 (ja) 1987-10-02 1987-10-02 半導体装置
JP87-249329 1987-10-02

Publications (2)

Publication Number Publication Date
KR890007386A true KR890007386A (ko) 1989-06-19
KR920001174B1 KR920001174B1 (ko) 1992-02-06

Family

ID=17191388

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880012647A KR920001174B1 (ko) 1987-10-02 1988-09-29 반도체장치 및 그 제조방법

Country Status (5)

Country Link
US (1) US4937652A (ko)
EP (1) EP0310108B1 (ko)
JP (1) JPH0719841B2 (ko)
KR (1) KR920001174B1 (ko)
DE (1) DE3853392T2 (ko)

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US6271137B1 (en) 1989-11-30 2001-08-07 Stmicroelectronics, Inc. Method of producing an aluminum stacked contact/via for multilayer
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US6242811B1 (en) 1989-11-30 2001-06-05 Stmicroelectronics, Inc. Interlevel contact including aluminum-refractory metal alloy formed during aluminum deposition at an elevated temperature
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JP2563652B2 (ja) * 1990-07-17 1996-12-11 株式会社東芝 半導体装置及びその製造方法
JP2598335B2 (ja) * 1990-08-28 1997-04-09 三菱電機株式会社 半導体集積回路装置の配線接続構造およびその製造方法
EP0480409B1 (en) * 1990-10-09 1994-07-13 Nec Corporation Method of fabricating a Ti/TiN/Al contact, with a reactive sputtering step
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JP2660359B2 (ja) * 1991-01-30 1997-10-08 三菱電機株式会社 半導体装置
JP3099406B2 (ja) * 1991-04-05 2000-10-16 ヤマハ株式会社 集積回路の多層配線構造
JPH0575061A (ja) * 1991-09-13 1993-03-26 Oki Electric Ind Co Ltd 半導体記憶装置の配線構造
US5200359A (en) * 1991-10-03 1993-04-06 Micron Technology, Inc. Method of decreasing contact resistance between a lower elevation aluminum layer and a higher elevation electrically conductive layer
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US6690044B1 (en) * 1993-03-19 2004-02-10 Micron Technology, Inc. Approach to avoid buckling BPSG by using an intermediate barrier layer
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Also Published As

Publication number Publication date
JPH0719841B2 (ja) 1995-03-06
US4937652A (en) 1990-06-26
JPH0191438A (en) 1989-04-11
DE3853392D1 (de) 1995-04-27
EP0310108B1 (en) 1995-03-22
KR920001174B1 (ko) 1992-02-06
DE3853392T2 (de) 1995-09-07
EP0310108A2 (en) 1989-04-05
EP0310108A3 (en) 1991-02-06

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