KR920020763A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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Publication number
KR920020763A
KR920020763A KR1019910006292A KR910006292A KR920020763A KR 920020763 A KR920020763 A KR 920020763A KR 1019910006292 A KR1019910006292 A KR 1019910006292A KR 910006292 A KR910006292 A KR 910006292A KR 920020763 A KR920020763 A KR 920020763A
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KR
South Korea
Prior art keywords
semiconductor device
gate
polycrystalline silicon
oxide film
manufacturing
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Application number
KR1019910006292A
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English (en)
Inventor
양창집
강영호
안정수
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019910006292A priority Critical patent/KR920020763A/ko
Priority to JP3206896A priority patent/JPH04326766A/ja
Priority to GB9118260A priority patent/GB2254960A/en
Priority to DE4128211A priority patent/DE4128211A1/de
Publication of KR920020763A publication Critical patent/KR920020763A/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 이 발명에 따른 반도체 장치의 단면도.
제5(a)~(c)도는 제2도의 제조공정도이다.

Claims (8)

  1. 반도체 기판과 상기 반도체 기판의 표면의 소정부분에 형성된 소오스 및 드레인 영역과, 상기 반도체 기판표면의 소오스 및 드레인영역사이에 형성된 게이트 산화막과, 상기 게이트 산화막상에 다층의 다결정 실리콘으로 이루어지며 하부의 층이 상부의 층들보다 입자가 크도록 이루어진 게이트를 구비한 반도체 장치.
  2. 제1항에 있어서, 상기 게이트의 상부에 게이트 산화막을 개재시켜 이 게이트의 동일한 구조를 가지는 게이트를 더 구비한 반도제 장치.
  3. 반도체 기판 표면에 소자를 분리하는 필드산화막을 형성하는 공정과, 상기 필드산화막이 형성되지 않은 반도체 기판의 표면에 게이트산화막을 형성하는 공정과, 상술한 구조의 상부에 비정질 실리콘과 다결정 실리콘을 순차적으로 칩적하는 공정과, 상기 다결정 실리콘에 불순물을 도핑함과 동시에 비정질 실리콘을 다결정 실리콘으로 변환시키는 공정과, 상기 다층의 다결정 실리콘으로 게이트를 형성하는 공정과, 상기 반도체 기판의 표면에 소오스 및 드레인 영역을 형성하는 공정으로 이루어지는 반도체 장치의 제조방법.
  4. 제3항에 있어서, 상기 비정질 실리콘과 다결정 실리콘을 LPCVD방법으로 한번의 공정에 의해 형성되는 반도체 장치의 제조방법.
  5. 제4항에 있어서, 상기 비정질 실리콘을 540∼570℃정도의 온도로 형성하는 반도체 장치의 제조방법.
  6. 제4항에 있어서, 상기 다결정 실리콘을 610∼640℃정도의 온도로 형성하는 반도체 장치의 제조방법.
  7. 제4항에 있어서, 상기 LPCVD방법은 분위기 가스로 N2또는 불활성 가스를 사용하는 반도체장치의 제조방법.
  8. 제3항에 있어서, 상기 불순물의 도핑을 850∼950℃정도의 온도에서 하는 반도체 장치의 제조방법.
    * 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910006292A 1991-04-19 1991-04-19 반도체장치 및 그 제조방법 KR920020763A (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019910006292A KR920020763A (ko) 1991-04-19 1991-04-19 반도체장치 및 그 제조방법
JP3206896A JPH04326766A (ja) 1991-04-19 1991-08-19 半導体装置及びその製造方法
GB9118260A GB2254960A (en) 1991-04-19 1991-08-23 Gate electrode for a mos device and manufacture
DE4128211A DE4128211A1 (de) 1991-04-19 1991-08-26 Halbleitervorrichtung und verfahren zur herstellung derselben

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910006292A KR920020763A (ko) 1991-04-19 1991-04-19 반도체장치 및 그 제조방법

Publications (1)

Publication Number Publication Date
KR920020763A true KR920020763A (ko) 1992-11-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910006292A KR920020763A (ko) 1991-04-19 1991-04-19 반도체장치 및 그 제조방법

Country Status (4)

Country Link
JP (1) JPH04326766A (ko)
KR (1) KR920020763A (ko)
DE (1) DE4128211A1 (ko)
GB (1) GB2254960A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100559036B1 (ko) * 1999-11-09 2006-03-10 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성 방법

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5468666A (en) * 1993-04-29 1995-11-21 Texas Instruments Incorporated Using a change in doping of poly gate to permit placing both high voltage and low voltage transistors on the same chip
DE4440857C2 (de) * 1993-11-16 2002-10-24 Hyundai Electronics Ind Verfahren zur Herstellung einer Gateelektrode einer Halbleitervorrichtung
JP3599290B2 (ja) * 1994-09-19 2004-12-08 株式会社ルネサステクノロジ 半導体装置
CN1076865C (zh) * 1995-04-28 2001-12-26 现代电子产业株式会社 形成半导体器件中的栅极电极的方法
JP2904341B2 (ja) * 1996-03-06 1999-06-14 日本電気株式会社 半導体装置およびその製造方法
JPH11307765A (ja) * 1998-04-20 1999-11-05 Nec Corp 半導体装置及びその製造方法
JP2000150882A (ja) * 1998-09-04 2000-05-30 Toshiba Corp Mis型半導体装置及びその製造方法
AU7478400A (en) * 1999-09-14 2001-04-17 General Semiconductor, Inc. Trench dmos transistor having improved trench structure
US6781196B2 (en) 2002-03-11 2004-08-24 General Semiconductor, Inc. Trench DMOS transistor having improved trench structure
US6902993B2 (en) * 2003-03-28 2005-06-07 Cypress Semiconductor Corporation Gate electrode for MOS transistors
JP2005277318A (ja) * 2004-03-26 2005-10-06 Semiconductor Leading Edge Technologies Inc 高誘電体薄膜を備えた半導体装置及びその製造方法
JP6335334B2 (ja) * 2015-01-09 2018-05-30 株式会社日立製作所 パワー半導体素子、パワーモジュール、および電力変換装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4249968A (en) * 1978-12-29 1981-02-10 International Business Machines Corporation Method of manufacturing a metal-insulator-semiconductor utilizing a multiple stage deposition of polycrystalline layers
US4845047A (en) * 1987-06-25 1989-07-04 Texas Instruments Incorporated Threshold adjustment method for an IGFET
JP2662877B2 (ja) * 1988-05-17 1997-10-15 富士通株式会社 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100559036B1 (ko) * 1999-11-09 2006-03-10 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성 방법

Also Published As

Publication number Publication date
DE4128211A1 (de) 1992-10-22
JPH04326766A (ja) 1992-11-16
GB2254960A (en) 1992-10-21
GB9118260D0 (en) 1991-10-09

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