KR920010974A - 반도체장치 및 그의 제조방법 - Google Patents
반도체장치 및 그의 제조방법 Download PDFInfo
- Publication number
- KR920010974A KR920010974A KR1019910018670A KR910018670A KR920010974A KR 920010974 A KR920010974 A KR 920010974A KR 1019910018670 A KR1019910018670 A KR 1019910018670A KR 910018670 A KR910018670 A KR 910018670A KR 920010974 A KR920010974 A KR 920010974A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor substrate
- orientation
- polycrystalline
- layer
- predetermined
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 3
- 239000004065 semiconductor Substances 0.000 title claims 7
- 239000013078 crystal Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims 7
- 239000012535 impurity Substances 0.000 claims 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 claims 1
- 238000002425 crystallisation Methods 0.000 claims 1
- 230000008025 crystallization Effects 0.000 claims 1
- 239000007789 gas Substances 0.000 claims 1
- 150000002500 ions Chemical class 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 238000000059 patterning Methods 0.000 claims 1
- 239000012495 reaction gas Substances 0.000 claims 1
- 229910000077 silane Inorganic materials 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Recrystallisation Techniques (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예에 의한 게이트전극을 구비한 P채널 MOS트랜지스터를 표시한 단면도, 제2도는 제1도에 표시한 게이트전극의 결정구조를 설명하기 위해서의 확대단면도, 제3A도 내지 제3D도는 제1도에 표시한 P채널 MOS트랜지스터의 제조프로세스를 설명하기 위해서의 단면도.
Claims (3)
- 제1도전형의 반도체기판의 상기 제1도전형의 반도체 기판상에 소정의 간격을 두고 형성되어 제2도전형을 가지는 1쌍의 불순물영역과 상기 1쌍의 불순물영역간의 상기 반도체기판상에 절연막을 끼워서 형성되어 그의 결정립의 결정방위가 소정의 방위에 갖추어진 다결정체층을 가지는 게이트전극을 구비하는 반도체장치.
- 반도체기판상에 그의 결정립의 결정방위가 소정의 방위에 갖추어지게 다결정체층을 형성하는 공정과 상기 다결정체층을 패터닝하는 공정과 상기 패터닝된 다결정체층을 마스크로서 상기 다결정체층의 결정방위에 대해 소정의 각도기울인 방향에 이온주입하는 것에 의해 상기 반도체 기판상에 불순물영역을 형성하는 공정을 구비하는 반도체장치의 제조방법.
- 다결정 실리콘층의 제조방법이고 하지로되는 기재상에 반응가스로서 시란계가스를 사용하여 분위기압력 0.1∼1.0Torr, 분위기온도 550℃∼620℃의 조건하에서 화학기상성장법에 의해 그의 결정립의 결정방위가 소정의 방위에 갖추어 지도록 다결정 실리콘층을 형성하는 다결정 실리콘층의 제조방법.※ 참고사항:최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2314542A JP2875380B2 (ja) | 1990-11-19 | 1990-11-19 | 半導体装置およびその製造方法 |
JP90-314542 | 1990-11-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920010974A true KR920010974A (ko) | 1992-06-27 |
KR950006486B1 KR950006486B1 (ko) | 1995-06-15 |
Family
ID=18054549
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910018670A KR950006486B1 (ko) | 1990-11-19 | 1991-10-23 | 반도체장치 및 그의 제조방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5381032A (ko) |
JP (1) | JP2875380B2 (ko) |
KR (1) | KR950006486B1 (ko) |
DE (1) | DE4138057C2 (ko) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5444302A (en) * | 1992-12-25 | 1995-08-22 | Hitachi, Ltd. | Semiconductor device including multi-layer conductive thin film of polycrystalline material |
KR960012585B1 (en) * | 1993-06-25 | 1996-09-23 | Samsung Electronics Co Ltd | Transistor structure and the method for manufacturing the same |
EP0643417A3 (en) * | 1993-09-08 | 1995-10-04 | At & T Corp | Method for installing the door. |
JP3599290B2 (ja) * | 1994-09-19 | 2004-12-08 | 株式会社ルネサステクノロジ | 半導体装置 |
US6881611B1 (en) * | 1996-07-12 | 2005-04-19 | Fujitsu Limited | Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device |
KR100469516B1 (ko) * | 1996-07-12 | 2005-02-02 | 후지쯔 가부시끼가이샤 | 반도체 장치의 제조 방법 및 반도체 장치 |
JPH1041412A (ja) * | 1996-07-18 | 1998-02-13 | Toshiba Corp | 半導体装置およびその製造方法 |
JP3090201B2 (ja) * | 1997-06-04 | 2000-09-18 | 日本電気株式会社 | 多結晶シリコン膜及び半導体装置 |
US6476462B2 (en) * | 1999-12-28 | 2002-11-05 | Texas Instruments Incorporated | MOS-type semiconductor device and method for making same |
KR100487426B1 (ko) * | 2001-07-11 | 2005-05-04 | 엘지.필립스 엘시디 주식회사 | 폴리실리콘 결정화방법 그리고, 이를 이용한 폴리실리콘박막트랜지스터의 제조방법 및 액정표시소자의 제조방법 |
JP3781666B2 (ja) * | 2001-11-29 | 2006-05-31 | エルピーダメモリ株式会社 | ゲート電極の形成方法及びゲート電極構造 |
US9209298B2 (en) * | 2013-03-08 | 2015-12-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal-oxide-semiconductor field-effect transistor with extended gate dielectric layer |
US9768259B2 (en) | 2013-07-26 | 2017-09-19 | Cree, Inc. | Controlled ion implantation into silicon carbide using channeling and devices fabricated using controlled ion implantation into silicon carbide using channeling |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6132170A (ja) * | 1984-07-23 | 1986-02-14 | Ricoh Co Ltd | 漢字部推定カナ漢字変換処理装置 |
JPS61174758A (ja) * | 1985-01-30 | 1986-08-06 | Mitsubishi Electric Corp | 相補型半導体集積回路装置 |
JPS6276677A (ja) * | 1985-09-30 | 1987-04-08 | Toshiba Corp | 半導体装置の製造方法 |
JPS62179766A (ja) * | 1986-02-04 | 1987-08-06 | Seiko Instr & Electronics Ltd | Misトランジスタ−の製造方法 |
US4808555A (en) * | 1986-07-10 | 1989-02-28 | Motorola, Inc. | Multiple step formation of conductive material layers |
JPS6348865A (ja) * | 1986-08-19 | 1988-03-01 | Toshiba Corp | 半導体装置 |
JPH0287575A (ja) * | 1988-09-24 | 1990-03-28 | Nec Corp | Mis型半導体集積回路装置 |
JPH02140933A (ja) * | 1988-11-21 | 1990-05-30 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2875379B2 (ja) * | 1990-11-19 | 1999-03-31 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
-
1990
- 1990-11-19 JP JP2314542A patent/JP2875380B2/ja not_active Expired - Fee Related
-
1991
- 1991-10-23 KR KR1019910018670A patent/KR950006486B1/ko not_active IP Right Cessation
- 1991-11-19 DE DE4138057A patent/DE4138057C2/de not_active Expired - Fee Related
-
1993
- 1993-08-26 US US08/111,964 patent/US5381032A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE4138057C2 (de) | 1998-07-16 |
DE4138057A1 (de) | 1992-05-21 |
KR950006486B1 (ko) | 1995-06-15 |
US5381032A (en) | 1995-01-10 |
JPH04188674A (ja) | 1992-07-07 |
JP2875380B2 (ja) | 1999-03-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR960005955A (ko) | 박막 반도체 소자, 박막 트랜지스터 및 그의 제조방법 | |
KR840008537A (ko) | 반도체장치 | |
KR920010974A (ko) | 반도체장치 및 그의 제조방법 | |
KR930005257A (ko) | 박막 전계효과 소자 및 그의 제조방법 | |
KR980005382A (ko) | Soi소자 및 그 제조방법 | |
KR970063680A (ko) | 폴리 실리콘 박막 트랜지스터의 제조방법 | |
KR900019239A (ko) | 집적회로용 로칼인터커넥트 | |
KR920010975A (ko) | 반도체장치 및 그의 제조방법 | |
GB1422033A (en) | Method of manufacturing a semiconductor device | |
KR950034833A (ko) | 반도체 소자의 콘트롤 게이트 전극 형성방법 | |
KR910019260A (ko) | 반도체장치및 그의 제조방법 | |
KR960026943A (ko) | 반도체장치 및 그 제조방법 | |
KR950030282A (ko) | 박막 트랜지스터의 제조방법 | |
KR920020763A (ko) | 반도체장치 및 그 제조방법 | |
KR950010109A (ko) | 고속 바이폴라 트랜지스터의 제조방법 | |
KR970053971A (ko) | 정전기 방지용 트랜지스터 및 그의 제조방법 | |
KR900015311A (ko) | 반도체장치 및 그 제조방법 | |
KR880013232A (ko) | 반도체장치 및 그 제조방법 | |
JP2653092B2 (ja) | 相補型薄膜トランジスタ及びその製造方法 | |
KR950028175A (ko) | 폴리사이드구조의 전극을 갖는 반도체장치 및 그 제조방법 | |
JP2000294782A (ja) | 半導体装置の作製方法 | |
JPS597231B2 (ja) | 絶縁ゲイト型電界効果半導体装置の作製方法 | |
KR0139741B1 (ko) | 박막트랜지스터 제조방법 | |
JPH0555246A (ja) | 絶縁ゲイト型半導体装置の作製方法 | |
JPS605068B2 (ja) | Mos形半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20060612 Year of fee payment: 12 |
|
LAPS | Lapse due to unpaid annual fee |