KR900017143A - 바이-씨모스 반도체소자 제조방법 - Google Patents

바이-씨모스 반도체소자 제조방법

Info

Publication number
KR900017143A
KR900017143A KR1019890005700A KR890005700A KR900017143A KR 900017143 A KR900017143 A KR 900017143A KR 1019890005700 A KR1019890005700 A KR 1019890005700A KR 890005700 A KR890005700 A KR 890005700A KR 900017143 A KR900017143 A KR 900017143A
Authority
KR
South Korea
Prior art keywords
smos
semiconductor device
device manufacturing
layer
impurities
Prior art date
Application number
KR1019890005700A
Other languages
English (en)
Inventor
정상기
Original Assignee
이만용
금성반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이만용, 금성반도체 주식회사 filed Critical 이만용
Priority to KR1019890005700A priority Critical patent/KR900017143A/ko
Publication of KR900017143A publication Critical patent/KR900017143A/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음

Description

바이-씨모스 반도체소자 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 의한 바이-씨모스 반도체소자의 단면도.

Claims (1)

  1. P형기판(1)에 N+매입층(2)을 형성하고, N-에피택설층(3)을 성장시킨 다음 P헬(4)을 형성하여 그 P웰(4)에 대한 SiO2산화물층(5)을 형성하며, 게이트를 형성하고, 그후 N+불순물, P+불순물을 확산시키며, PSG층(6)을 형성하고, 콘택트를 형성해 금속층을 적층하는 것을 특징으로하는 바이-씨모스 반도체소자의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890005700A 1989-04-29 1989-04-29 바이-씨모스 반도체소자 제조방법 KR900017143A (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890005700A KR900017143A (ko) 1989-04-29 1989-04-29 바이-씨모스 반도체소자 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890005700A KR900017143A (ko) 1989-04-29 1989-04-29 바이-씨모스 반도체소자 제조방법

Publications (1)

Publication Number Publication Date
KR900017143A true KR900017143A (ko) 1990-11-15

Family

ID=67776974

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890005700A KR900017143A (ko) 1989-04-29 1989-04-29 바이-씨모스 반도체소자 제조방법

Country Status (1)

Country Link
KR (1) KR900017143A (ko)

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Legal Events

Date Code Title Description
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid