KR860700370A - 집적 회로소자 및 그 제조방법 - Google Patents

집적 회로소자 및 그 제조방법

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Publication number
KR860700370A
KR860700370A KR1019860700498A KR860700498A KR860700370A KR 860700370 A KR860700370 A KR 860700370A KR 1019860700498 A KR1019860700498 A KR 1019860700498A KR 860700498 A KR860700498 A KR 860700498A KR 860700370 A KR860700370 A KR 860700370A
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KR
South Korea
Prior art keywords
trench
region
forming
source
drain
Prior art date
Application number
KR1019860700498A
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English (en)
Other versions
KR930011895B1 (ko
Inventor
테오도어 패노시스 피터
Original Assignee
마이클 와이. 엡스타인
아메리칸 텔리폰 앤드 텔레그라프 캄파니
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Application filed by 마이클 와이. 엡스타인, 아메리칸 텔리폰 앤드 텔레그라프 캄파니 filed Critical 마이클 와이. 엡스타인
Publication of KR860700370A publication Critical patent/KR860700370A/ko
Application granted granted Critical
Publication of KR930011895B1 publication Critical patent/KR930011895B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221—Three dimensional integrated circuits stacked in different levels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음

Description

집적 회로소자 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 깊은 트랜치 게이트 구조를 사용하는 기술에 의해 펀치 쓰르우 효과를 피하기 위하여 의도되는 구조의 대표 예의 개략도.

Claims (6)

  1. (가) 실제적으로 수직 측벽을 가지는 트랜치를 반도체 기판의 표면에 형성시키는 단계를 포함하는 집적회로소자의 제조 방법에 있어서, (나) 트랜치의 바닥과 측벽을 덮는 게이트 유전체 층을 형성하는 단계와, (다) 게이트 유전체 층에 게이트 전극을 형성하는 단계와, (라) 기판의 표면에 소드와 드레인 영역을 형성하는 단계로서, 상기 소스와 드레인 영역은 트랜치에 의해 다른 것으로 부터 분리되며, (마) 트랜치의 바닥에 주입영역을 형성하며, 소스와 드레인 영역을 분리하는 단계로서, 상기 주입영역은 주변 물질보다 높은 도우핑 레벨을 가지는 것을 특징으로 하는 직접회로 소자 제조방법.
  2. 제1항에 있어서, 단계(마)에서 형성된 주입영역이 트랜치 바닥의 표면의 바닥 아래에 형성되는 것을 특징으로 하는 집적회로 소자 제조방법.
  3. 제1항에 있어서, 단계(마)에서 형성된 주입 영역이 트랜치 바닥에 또한 그 근처에 형성되는 것을 특징으로 하는 직접회로 소자 제조방법.
  4. 반도체 기판에 형성된 MOS 트랜지스터의 소스 영역와, 그 기판에 형성된 MOM 트랜지스터의 드레인 영역과, 상기 소스 및 드레인을 분리하는 트랜치 게이트 구조를 포함하고, 상기 트랜치 게이트 구조는 기판에 형성된 실제적으로 수직 측벽을 갖는 홈을 포함하는 소자에 있어서, 바닥과 실제적으로 수직인 측벽을 덮는 유전체층과, 상기 유전체층을 덮는 게이트 전극과, 소스, 드레인 및 게이트를 접촉하는 전기접촉 수단과, 주변의 기판 물질보다 적은 저항성을 가지며 트랜치의 바닥에 형성된 주입영역을 포함하는 것을 특징으로 하는 소자.
  5. 제4항에 있어서, 주입영역이 트랜치의 실제적으로 바닥 이하에 형성된 것을 특징으로 하는 소자.
  6. 제4항에 있어서, 주입영역이 트랜치의 바닥에 또한 그 근처에 형성되는 것을 특징으로 하는 소자.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019860700498A 1984-11-26 1985-11-08 집적회로소자 및 그 제조방법 KR930011895B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US674,855 1984-11-26
US06/674,855 US4835585A (en) 1984-11-26 1984-11-26 Trench gate structures
PCT/US1985/002233 WO1986003335A1 (en) 1984-11-26 1985-11-08 Method for manufacturing trench gate mos structures in ics and accordingly fabricated devices

Publications (2)

Publication Number Publication Date
KR860700370A true KR860700370A (ko) 1986-10-06
KR930011895B1 KR930011895B1 (ko) 1993-12-22

Family

ID=24708156

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860700498A KR930011895B1 (ko) 1984-11-26 1985-11-08 집적회로소자 및 그 제조방법

Country Status (5)

Country Link
US (1) US4835585A (ko)
EP (1) EP0203114A1 (ko)
JP (1) JP2560008B2 (ko)
KR (1) KR930011895B1 (ko)
WO (1) WO1986003335A1 (ko)

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Also Published As

Publication number Publication date
WO1986003335A1 (en) 1986-06-05
JPS62500898A (ja) 1987-04-09
KR930011895B1 (ko) 1993-12-22
US4835585A (en) 1989-05-30
EP0203114A1 (en) 1986-12-03
JP2560008B2 (ja) 1996-12-04

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