KR20130118781A - 리드 프레임, 반도체 패키지, 및 그 제조 방법 - Google Patents

리드 프레임, 반도체 패키지, 및 그 제조 방법 Download PDF

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Publication number
KR20130118781A
KR20130118781A KR1020130041515A KR20130041515A KR20130118781A KR 20130118781 A KR20130118781 A KR 20130118781A KR 1020130041515 A KR1020130041515 A KR 1020130041515A KR 20130041515 A KR20130041515 A KR 20130041515A KR 20130118781 A KR20130118781 A KR 20130118781A
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South Korea
Prior art keywords
terminal portion
lead frame
terminal
semiconductor package
semiconductor chip
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KR1020130041515A
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English (en)
Korean (ko)
Inventor
유키하루 다케우치
Original Assignee
신꼬오덴기 고교 가부시키가이샤
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Publication of KR20130118781A publication Critical patent/KR20130118781A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/458—Materials of insulating layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
KR1020130041515A 2012-04-20 2013-04-16 리드 프레임, 반도체 패키지, 및 그 제조 방법 Withdrawn KR20130118781A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012097053A JP2013225595A (ja) 2012-04-20 2012-04-20 リードフレーム及び半導体パッケージ並びにそれらの製造方法
JPJP-P-2012-097053 2012-04-20

Publications (1)

Publication Number Publication Date
KR20130118781A true KR20130118781A (ko) 2013-10-30

Family

ID=49379343

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130041515A Withdrawn KR20130118781A (ko) 2012-04-20 2013-04-16 리드 프레임, 반도체 패키지, 및 그 제조 방법

Country Status (5)

Country Link
US (1) US8853841B2 (https=)
JP (1) JP2013225595A (https=)
KR (1) KR20130118781A (https=)
CN (1) CN103378045A (https=)
TW (1) TW201405723A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180077028A (ko) * 2016-12-28 2018-07-06 가부시기가이샤 디스코 반도체 패키지의 제조 방법

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014188632A1 (ja) * 2013-05-23 2014-11-27 パナソニック株式会社 放熱構造を有する半導体装置および半導体装置の積層体
JP6269417B2 (ja) * 2014-09-26 2018-01-31 三菱電機株式会社 半導体装置
US20160172275A1 (en) * 2014-12-10 2016-06-16 Stmicroelectronics S.R.L. Package for a surface-mount semiconductor device and manufacturing method thereof
JP6840466B2 (ja) * 2016-03-08 2021-03-10 株式会社アムコー・テクノロジー・ジャパン 半導体パッケージ及び半導体パッケージの製造方法
JP6603169B2 (ja) * 2016-04-22 2019-11-06 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
US10153424B2 (en) * 2016-08-22 2018-12-11 Rohm Co., Ltd. Semiconductor device and mounting structure of semiconductor device
JP6850202B2 (ja) * 2017-06-02 2021-03-31 株式会社三井ハイテック リードフレーム、リードフレームの製造方法および半導体装置の製造方法
JP7037368B2 (ja) * 2018-01-09 2022-03-16 ローム株式会社 半導体装置および半導体装置の製造方法
EP3736857A1 (en) 2019-05-07 2020-11-11 Nexperia B.V. Through hole side wettable flank
CN112652583A (zh) * 2019-10-10 2021-04-13 珠海格力电器股份有限公司 一种封装器件及其生产方法
CN111106089B (zh) * 2019-11-29 2021-08-17 青岛歌尔微电子研究院有限公司 高密度管脚qfn的封装结构与方法
CN111987002A (zh) * 2020-09-04 2020-11-24 长电科技（滁州）有限公司 一种封装体成型方法
IT202100005759A1 (it) * 2021-03-11 2022-09-11 St Microelectronics Srl Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente
CN115083923A (zh) * 2021-03-11 2022-09-20 意法半导体股份有限公司 制造半导体器件的方法和相应的半导体器件
KR102514564B1 (ko) * 2021-06-28 2023-03-29 해성디에스 주식회사 홈이 형성된 리드를 포함하는 리드 프레임
JP7614985B2 (ja) * 2021-09-08 2025-01-16 Ｔｏｗａ株式会社 半導体装置の製造方法およびリードフレーム
TWI897650B (zh) * 2024-09-26 2025-09-11 強茂股份有限公司 孔壁形成側面可潤濕結構的封裝元件

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270627A (ja) * 2001-03-13 2002-09-20 New Japan Radio Co Ltd 半導体装置の製造方法
JP2004019465A (ja) * 2002-06-12 2004-01-22 Fuji Heavy Ind Ltd エンジンの圧縮圧力診断装置
WO2004082019A1 (ja) * 2003-03-11 2004-09-23 The Furukawa Electric Co. Ltd. プリント配線基板、その製造方法、リードフレームパッケージおよび光モジュール
US7195953B2 (en) * 2003-04-02 2007-03-27 Yamaha Corporation Method of manufacturing a semiconductor package using a lead frame having through holes or hollows therein
JP3915794B2 (ja) * 2003-04-02 2007-05-16 ヤマハ株式会社 半導体パッケージ、その製造方法、および、これに使用するリードフレーム
JP2006019465A (ja) * 2004-07-01 2006-01-19 Mitsui Chemicals Inc 半導体パッケージおよびその製造方法
US8501539B2 (en) * 2009-11-12 2013-08-06 Freescale Semiconductor, Inc. Semiconductor device package
JP5546363B2 (ja) * 2010-06-11 2014-07-09 ローム株式会社 半導体装置および半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180077028A (ko) * 2016-12-28 2018-07-06 가부시기가이샤 디스코 반도체 패키지의 제조 방법

Also Published As

Publication number Publication date
JP2013225595A (ja) 2013-10-31
US8853841B2 (en) 2014-10-07
TW201405723A (zh) 2014-02-01
US20130277817A1 (en) 2013-10-24
CN103378045A (zh) 2013-10-30

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