KR20130007602A - 오프셋 다이 스태킹의 멀티-칩 패키지 및 그 제조 방법 - Google Patents

오프셋 다이 스태킹의 멀티-칩 패키지 및 그 제조 방법 Download PDF

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Publication number
KR20130007602A
KR20130007602A KR1020127026510A KR20127026510A KR20130007602A KR 20130007602 A KR20130007602 A KR 20130007602A KR 1020127026510 A KR1020127026510 A KR 1020127026510A KR 20127026510 A KR20127026510 A KR 20127026510A KR 20130007602 A KR20130007602 A KR 20130007602A
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South Korea
Prior art keywords
dice
die
group
substrate
bonding
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English (en)
Korean (ko)
Inventor
피터 길링햄
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모사이드 테크놀로지스 인코퍼레이티드
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Publication of KR20130007602A publication Critical patent/KR20130007602A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/24—Configurations of stacked chips at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

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  • Wire Bonding (AREA)
  • Semiconductor Memories (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
KR1020127026510A 2010-03-18 2011-03-08 오프셋 다이 스태킹의 멀티-칩 패키지 및 그 제조 방법 Withdrawn KR20130007602A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US31511110P 2010-03-18 2010-03-18
US61/315,111 2010-03-18
PCT/CA2011/000253 WO2011113136A1 (en) 2010-03-18 2011-03-08 Multi-chip package with offset die stacking and method of making same

Publications (1)

Publication Number Publication Date
KR20130007602A true KR20130007602A (ko) 2013-01-18

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020127026510A Withdrawn KR20130007602A (ko) 2010-03-18 2011-03-08 오프셋 다이 스태킹의 멀티-칩 패키지 및 그 제조 방법

Country Status (6)

Country Link
US (2) US8502368B2 (https=)
EP (1) EP2548226A4 (https=)
JP (1) JP5579879B2 (https=)
KR (1) KR20130007602A (https=)
CN (1) CN103098206A (https=)
WO (1) WO2011113136A1 (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
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KR20140144486A (ko) * 2013-06-11 2014-12-19 에스케이하이닉스 주식회사 적층 패키지 및 제조 방법
KR20180057427A (ko) * 2016-11-22 2018-05-30 삼성전자주식회사 반도체 패키지 및 그 제조 방법
KR20220014553A (ko) * 2020-07-29 2022-02-07 에스케이하이닉스 주식회사 다이 위치 검사부들을 포함하는 반도체 패키지

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KR101909203B1 (ko) * 2011-07-21 2018-10-17 삼성전자 주식회사 멀티-채널 패키지 및 그 패키지를 포함한 전자 시스템
US20150333041A1 (en) * 2012-12-25 2015-11-19 Ps5 Luxco S.A.R.L. Semiconductor device and manufacturing method therefor
JP2014138035A (ja) * 2013-01-15 2014-07-28 Toshiba Corp 半導体装置
KR102110984B1 (ko) 2013-03-04 2020-05-14 삼성전자주식회사 적층형 반도체 패키지
GB2518476B (en) 2013-09-20 2015-11-04 Silicon Lab Inc Multi-chip modules having stacked television demodulators
WO2017095401A1 (en) 2015-12-02 2017-06-08 Intel Corporation Die stack with cascade and vertical connections
JP6761180B2 (ja) * 2016-12-28 2020-09-23 株式会社バッファロー 半導体装置
CN108389849A (zh) * 2018-02-05 2018-08-10 奥肯思（北京）科技有限公司 一种交错堆叠存储器封装
KR20200028562A (ko) * 2018-09-06 2020-03-17 에스케이하이닉스 주식회사 반도체패키지
US11139283B2 (en) * 2018-12-22 2021-10-05 Xcelsis Corporation Abstracted NAND logic in stacks
JP2021064780A (ja) * 2019-10-11 2021-04-22 メレキシス テクノロジーズ エス エーＭｅｌｅｘｉｓ Ｔｅｃｈｎｏｌｏｇｉｅｓ ＳＡ 積層ダイアセンブリ
JP2021145084A (ja) * 2020-03-13 2021-09-24 キオクシア株式会社 半導体装置
CN112038280B (zh) * 2020-07-24 2022-07-29 华为技术有限公司 一种芯片转移方法、电子设备
US12136607B2 (en) * 2021-09-01 2024-11-05 Micron Technology, Inc. Semiconductor devices including stacked dies with interleaved wire bonds and associated systems and methods
KR20230106410A (ko) * 2022-01-06 2023-07-13 삼성전자주식회사 반도체 패키지
KR20230143497A (ko) * 2022-04-05 2023-10-12 삼성전자주식회사 반도체 패키지 및 그의 제조 방법
CN119208284A (zh) * 2023-06-14 2024-12-27 长鑫存储技术有限公司 一种半导体封装结构

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140144486A (ko) * 2013-06-11 2014-12-19 에스케이하이닉스 주식회사 적층 패키지 및 제조 방법
KR20180057427A (ko) * 2016-11-22 2018-05-30 삼성전자주식회사 반도체 패키지 및 그 제조 방법
KR20220014553A (ko) * 2020-07-29 2022-02-07 에스케이하이닉스 주식회사 다이 위치 검사부들을 포함하는 반도체 패키지

Also Published As

Publication number Publication date
JP5579879B2 (ja) 2014-08-27
US8502368B2 (en) 2013-08-06
US20120056335A1 (en) 2012-03-08
JP2013522887A (ja) 2013-06-13
WO2011113136A1 (en) 2011-09-22
EP2548226A1 (en) 2013-01-23
US9177863B2 (en) 2015-11-03
EP2548226A4 (en) 2013-11-20
US20130309810A1 (en) 2013-11-21
CN103098206A (zh) 2013-05-08

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