KR20080009006A - 반도체 장치의 제조 방법 및 반도체 장치 - Google Patents
반도체 장치의 제조 방법 및 반도체 장치 Download PDFInfo
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- KR20080009006A KR20080009006A KR1020070072832A KR20070072832A KR20080009006A KR 20080009006 A KR20080009006 A KR 20080009006A KR 1020070072832 A KR1020070072832 A KR 1020070072832A KR 20070072832 A KR20070072832 A KR 20070072832A KR 20080009006 A KR20080009006 A KR 20080009006A
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- 230000000694 effects Effects 0.000 description 9
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- 229910003077 Ti−O Inorganic materials 0.000 description 1
- YOGPEMONGVRERR-UHFFFAOYSA-N [C]=O.[Si]=O Chemical compound [C]=O.[Si]=O YOGPEMONGVRERR-UHFFFAOYSA-N 0.000 description 1
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
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- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
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Abstract
Description
Claims (20)
- 제1 기판 온도에서, 표면에 오목부가 형성된 층간 절연막 내 및 그 표면의 산화종을 방출시키는 공정과,상기 제1 기판 온도보다 낮은 제2 기판 온도에서, 상기 층간 절연막의 적어도 일부와 접촉하도록 하고, Ti 및 N을 포함하고, 산소(O) 및 귀금속 성분을 제외하는 전체 성분에서의 Ti 함유량이 50at%를 초과하는 층을 형성하는 공정과,상기 층 상에 Cu 금속층을 형성하는 공정을 구비하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 Ti 함유량이 60at% 이상인 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 Ti 함유량이 65∼97at%인 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 층은, Ti 및 N 외에, 귀금속 원소로부터 선택되는 적어도 1종의 금속 M을 더 포함하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 층 및 상기 Cu 금속층 사이에, Ti 또는 TiM(식에서, M은 귀금속 원소를 나타냄)으로 이루어지는 층을 개재시키는 공정을 더 구비하는 반도체 장치의 제조 방법.
- 표면에 오목부가 형성된 층간 절연막의 적어도 일부와 접촉하도록 하고, Ti 및 N을 포함하고, 산소(O) 및 귀금속 성분을 제외하는 전체 성분에서의 Ti 함유량이 50at%를 초과하는 층을 형성하는 공정과,상기 층간 절연막에 잔존하는 산화종에 의해, 상기 층의 적어도 일부를 산화하는 공정과,상기 층 상에 Cu 금속층을 형성하는 공정을 구비하는 반도체 장치의 제조 방법.
- 제6항에 있어서,상기 Ti 함유량이 60at% 이상인 반도체 장치의 제조 방법.
- 제6항에 있어서,상기 Ti 함유량이 65∼97at%인 반도체 장치의 제조 방법.
- 제6항에 있어서,상기 층은, Ti 및 N 외에, 귀금속 원소로부터 선택되는 적어도 1종의 금속 M을 더 포함하는 반도체 장치의 제조 방법.
- 제6항에 있어서,상기 층 및 상기 Cu 금속층 사이에, Ti 또는 TiM(식에서, M은 귀금속 원소를 나타냄)으로 이루어지는 층을 개재시키는 공정을 더 구비하는 반도체 장치의 제조 방법.
- 표면에 오목부가 형성된 층간 절연막의 적어도 일부와 접촉하도록 하고, Ti 및 N을 포함하고, 산소(O) 및 귀금속 성분을 제외하는 전체 성분에서의 Ti 함유량이 50at%를 초과하는 층을 형성하는 공정과,상기 층 상에 Cu 금속층을 형성하고, Ti와 Cu의 반응을 통하여 소정의 화합물을 계면에 형성하는 공정을 구비하는 반도체 장치의 제조 방법.
- 제11항에 있어서,상기 층 상에 Cu 금속층을 형성하고, Ti와 Cu의 반응을 통하여 소정의 화합물을 계면에 형성하는 공정은, 적어도 1회의, 200℃ 이상의 열처리를 포함하는 반도체 장치의 제조 방법.
- 제11항에 있어서,상기 Ti 함유량이 60at% 이상인 반도체 장치의 제조 방법.
- 제11항에 있어서,상기 Ti 함유량이 65∼97at%인 반도체 장치의 제조 방법.
- 제11항에 있어서,상기 층은, Ti 및 N 외에, 귀금속 원소로부터 선택되는 적어도 1종의 금속 M을 더 포함하는 반도체 장치의 제조 방법.
- 제11항에 있어서,상기 층 및 상기 Cu 금속층 사이에, Ti 또는 TiM(식에서, M은 귀금속 원소를 나타냄)으로 이루어지는 층을 개재시키는 공정을 더 구비하는 반도체 장치의 제조 방법.
- 표면에 오목부가 형성된 층간 절연막과,상기 층간 절연막 상에 형성된 Ti 및 N을 포함하고, 산소(O) 및 귀금속 성분을 제외하는 전체 성분 중에서의 Ti 함유량이 50at%를 초과하는 제1 층과,상기 제1 층 상에 형성된 Ti 또는 TiM(식에서, M은 귀금속 원소를 나타냄)으로 이루어지는 제2 층과,상기 Ti 또는 TiM으로 이루어지는 제2 층 상에 형성되고, 상기 층간 절연막에 형성된 상기 오목부를 매립하는 Cu 금속층을 구비하는 반도체 장치.
- 제17항에 있어서,상기 Ti 함유량이 60at% 이상인 반도체 장치.
- 제17항에 있어서,상기 Ti 함유량이 65∼97at%인 반도체 장치.
- 제17항에 있어서,상기 제1 층은, Ti 및 N 외에, 귀금속 원소로부터 선택되는 적어도 1종의 금속 M을 더 포함하는 반도체 장치.
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