KR20060051266A - 신호의 전압 진폭을 변환하는 레벨 변환 회로 - Google Patents

신호의 전압 진폭을 변환하는 레벨 변환 회로 Download PDF

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Publication number
KR20060051266A
KR20060051266A KR1020050085352A KR20050085352A KR20060051266A KR 20060051266 A KR20060051266 A KR 20060051266A KR 1020050085352 A KR1020050085352 A KR 1020050085352A KR 20050085352 A KR20050085352 A KR 20050085352A KR 20060051266 A KR20060051266 A KR 20060051266A
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KR
South Korea
Prior art keywords
channel mos
potential
level
mos transistor
transistor
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
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KR1020050085352A
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English (en)
Korean (ko)
Inventor
데루아끼 간자끼
Original Assignee
가부시끼가이샤 르네사스 테크놀로지
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Publication of KR20060051266A publication Critical patent/KR20060051266A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
KR1020050085352A 2004-09-21 2005-09-13 신호의 전압 진폭을 변환하는 레벨 변환 회로 Withdrawn KR20060051266A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2004273007 2004-09-21
JPJP-P-2004-00273007 2004-09-21
JPJP-P-2005-00176591 2005-06-16
JP2005176591A JP2006121654A (ja) 2004-09-21 2005-06-16 レベル変換回路

Publications (1)

Publication Number Publication Date
KR20060051266A true KR20060051266A (ko) 2006-05-19

Family

ID=36073315

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020050085352A Withdrawn KR20060051266A (ko) 2004-09-21 2005-09-13 신호의 전압 진폭을 변환하는 레벨 변환 회로

Country Status (4)

Country Link
US (3) US7432740B2 (enExample)
JP (1) JP2006121654A (enExample)
KR (1) KR20060051266A (enExample)
TW (1) TW200625808A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100788356B1 (ko) * 2006-10-26 2008-01-02 동부일렉트로닉스 주식회사 전압차가 큰 레벨 변환이 가능한 단일 전원 레벨 변환기

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CN100561869C (zh) * 2007-05-23 2009-11-18 中芯国际集成电路制造(上海)有限公司 电平转换电路
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US8207755B1 (en) 2011-02-15 2012-06-26 Taiwan Semiconductor Manufacturing Company, Ltd. Low leakage power detection circuit
US9054694B2 (en) * 2012-05-31 2015-06-09 Agency for Science, Technology Research Circuit arrangements and methods of operating the same
US9240787B2 (en) * 2013-12-19 2016-01-19 Sandisk Technologies Inc. Wide supply range high speed low-to-high level shifter
US9379710B2 (en) * 2014-02-27 2016-06-28 Arm Limited Level conversion circuit and method
US9196367B2 (en) * 2014-04-02 2015-11-24 Ememory Technology Inc. Non-volatile memory apparatus and erasing method thereof
CN105576967B (zh) * 2014-10-11 2018-07-24 中芯国际集成电路制造(上海)有限公司 升压转换电路
JP6524829B2 (ja) 2015-07-13 2019-06-05 株式会社デンソー レベルシフト回路
US9492144B1 (en) * 2015-12-02 2016-11-15 Butterfly Network, Inc. Multi-level pulser and related apparatus and methods
US10735001B2 (en) 2018-04-13 2020-08-04 Taiwan Semiconductor Manufacturing Company Ltd. Level shifter circuit and method of operating the same
US10985737B2 (en) * 2018-07-20 2021-04-20 Qualcomm Incorporated High-speed low-power level-shifting clock buffer
JP7361474B2 (ja) * 2019-01-31 2023-10-16 エイブリック株式会社 入力回路
KR20240115825A (ko) * 2021-12-13 2024-07-26 소니 세미컨덕터 솔루션즈 가부시키가이샤 트랜지스터 회로
US12101089B2 (en) * 2022-10-20 2024-09-24 Qualcomm Incorporated Enhanced rising and falling transitions for level shifting low-voltage input signals

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100788356B1 (ko) * 2006-10-26 2008-01-02 동부일렉트로닉스 주식회사 전압차가 큰 레벨 변환이 가능한 단일 전원 레벨 변환기

Also Published As

Publication number Publication date
US20090002026A1 (en) 2009-01-01
US20100109745A1 (en) 2010-05-06
TW200625808A (en) 2006-07-16
US7652505B2 (en) 2010-01-26
US8067961B2 (en) 2011-11-29
US7432740B2 (en) 2008-10-07
US20060061386A1 (en) 2006-03-23
JP2006121654A (ja) 2006-05-11

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20050913

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid