KR101377866B1 - 고 종횡비 피처들 및 연관된 구조체들을 형성하기 위한 선택적 식각 화학물들 - Google Patents

고 종횡비 피처들 및 연관된 구조체들을 형성하기 위한 선택적 식각 화학물들 Download PDF

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KR101377866B1
KR101377866B1 KR1020097006586A KR20097006586A KR101377866B1 KR 101377866 B1 KR101377866 B1 KR 101377866B1 KR 1020097006586 A KR1020097006586 A KR 1020097006586A KR 20097006586 A KR20097006586 A KR 20097006586A KR 101377866 B1 KR101377866 B1 KR 101377866B1
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KR20090058005A (ko
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마크 키엘바우크
테드 태일러
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마이크론 테크놀로지, 인크.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020097006586A 2006-08-31 2007-08-20 고 종횡비 피처들 및 연관된 구조체들을 형성하기 위한 선택적 식각 화학물들 Active KR101377866B1 (ko)

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Application Number Priority Date Filing Date Title
US11/515,435 2006-08-31
US11/515,435 US7517804B2 (en) 2006-08-31 2006-08-31 Selective etch chemistries for forming high aspect ratio features and associated structures

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KR20090058005A KR20090058005A (ko) 2009-06-08
KR101377866B1 true KR101377866B1 (ko) 2014-03-24

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US (3) US7517804B2 (enExample)
EP (1) EP2057669A2 (enExample)
JP (1) JP5273482B2 (enExample)
KR (1) KR101377866B1 (enExample)
CN (1) CN101501824B (enExample)
TW (1) TWI380362B (enExample)
WO (1) WO2008027240A2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020131989A1 (en) * 2018-12-21 2020-06-25 Mattson Technology, Inc. Surface smoothing of workpieces
WO2021188180A1 (en) * 2020-03-16 2021-09-23 Tokyo Electron Limited Sidewall protection layer formation for substrate processing

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4507120B2 (ja) * 2005-11-11 2010-07-21 エルピーダメモリ株式会社 半導体集積回路装置の製造方法
US7608195B2 (en) * 2006-02-21 2009-10-27 Micron Technology, Inc. High aspect ratio contacts
US7517804B2 (en) * 2006-08-31 2009-04-14 Micron Technologies, Inc. Selective etch chemistries for forming high aspect ratio features and associated structures
KR100849190B1 (ko) * 2007-03-19 2008-07-30 주식회사 하이닉스반도체 반도체 소자의 미세 패턴 형성 방법
US20090117745A1 (en) * 2007-11-02 2009-05-07 Li Siyi Methods for selectively etching a barrier layer in dual damascene applications
US20100330805A1 (en) * 2007-11-02 2010-12-30 Kenny Linh Doan Methods for forming high aspect ratio features on a substrate
JP4972594B2 (ja) * 2008-03-26 2012-07-11 東京エレクトロン株式会社 エッチング方法及び半導体デバイスの製造方法
US8226840B2 (en) * 2008-05-02 2012-07-24 Micron Technology, Inc. Methods of removing silicon dioxide
US7863180B2 (en) * 2008-05-06 2011-01-04 International Business Machines Corporation Through substrate via including variable sidewall profile
JP2010272758A (ja) * 2009-05-22 2010-12-02 Hitachi High-Technologies Corp 被エッチング材のプラズマエッチング方法
US8623148B2 (en) * 2009-09-10 2014-01-07 Matheson Tri-Gas, Inc. NF3 chamber clean additive
TW201216354A (en) * 2010-10-05 2012-04-16 Univ Nat Taiwan Science Tech Method for etching high-aspect-ratio features
JP5599355B2 (ja) * 2011-03-31 2014-10-01 富士フイルム株式会社 モールドの製造方法
US9653327B2 (en) * 2011-05-12 2017-05-16 Applied Materials, Inc. Methods of removing a material layer from a substrate using water vapor treatment
KR101342038B1 (ko) * 2011-08-10 2013-12-16 에스케이하이닉스 주식회사 반도체 장치 및 그 제조방법
US8598040B2 (en) * 2011-09-06 2013-12-03 Lam Research Corporation ETCH process for 3D flash structures
JP6001940B2 (ja) * 2012-07-11 2016-10-05 東京エレクトロン株式会社 パターン形成方法及び基板処理システム
US9132436B2 (en) 2012-09-21 2015-09-15 Applied Materials, Inc. Chemical control features in wafer process equipment
US9165785B2 (en) * 2013-03-29 2015-10-20 Tokyo Electron Limited Reducing bowing bias in etching an oxide layer
JP2014225501A (ja) 2013-05-15 2014-12-04 東京エレクトロン株式会社 プラズマエッチング方法及びプラズマエッチング装置
JP2015185770A (ja) * 2014-03-25 2015-10-22 株式会社東芝 半導体装置の製造方法
US9640385B2 (en) 2015-02-16 2017-05-02 Applied Materials, Inc. Gate electrode material residual removal process
US9741593B2 (en) 2015-08-06 2017-08-22 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US10504700B2 (en) 2015-08-27 2019-12-10 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US9984858B2 (en) * 2015-09-04 2018-05-29 Lam Research Corporation ALE smoothness: in and outside semiconductor industry
US9934984B2 (en) * 2015-09-09 2018-04-03 International Business Machines Corporation Hydrofluorocarbon gas-assisted plasma etch for interconnect fabrication
US10861693B2 (en) 2015-12-18 2020-12-08 Applied Materials, Inc. Cleaning method
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US9865484B1 (en) 2016-06-29 2018-01-09 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US10658194B2 (en) * 2016-08-23 2020-05-19 Lam Research Corporation Silicon-based deposition for semiconductor processing
US10037890B2 (en) * 2016-10-11 2018-07-31 Lam Research Corporation Method for selectively etching with reduced aspect ratio dependence
KR102535484B1 (ko) * 2016-11-29 2023-05-22 램 리써치 코포레이션 유기 층 에칭시 수직 프로파일들을 생성하기 위한 방법
US10607850B2 (en) 2016-12-30 2020-03-31 American Air Liquide, Inc. Iodine-containing compounds for etching semiconductor structures
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
JP7176860B6 (ja) 2017-05-17 2022-12-16 アプライド マテリアルズ インコーポレイテッド 前駆体の流れを改善する半導体処理チャンバ
US10276439B2 (en) 2017-06-02 2019-04-30 International Business Machines Corporation Rapid oxide etch for manufacturing through dielectric via structures
US10866504B2 (en) * 2017-12-22 2020-12-15 Taiwan Semiconductor Manufacturing Co., Ltd. Lithography mask with a black border region and method of fabricating the same
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
JP7420752B2 (ja) 2018-06-19 2024-01-23 アプライド マテリアルズ インコーポレイテッド パルスプラズマ堆積エッチングのステップカバレッジ改善
US11437242B2 (en) * 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
CN115380364A (zh) 2020-04-08 2022-11-22 朗姆研究公司 使用类金属或者含金属硬掩模的沉积的选择性蚀刻
US12266534B2 (en) 2020-06-15 2025-04-01 Tokyo Electron Limited Forming a semiconductor device using a protective layer
TW202213517A (zh) * 2020-08-28 2022-04-01 日商東京威力科創股份有限公司 基板處理方法及電漿處理裝置
US11195723B1 (en) * 2020-12-11 2021-12-07 Tokyo Electron Limited Non-atomic layer deposition (ALD) method of forming sidewall passivation layer during high aspect ratio carbon layer etch
CN114678324A (zh) * 2020-12-24 2022-06-28 中国科学院微电子研究所 一种在半导体器件中形成接触孔的方法、电容器制造方法
US12106971B2 (en) * 2020-12-28 2024-10-01 American Air Liquide, Inc. High conductive passivation layers and method of forming the same during high aspect ratio plasma etching
KR20230050130A (ko) * 2021-10-07 2023-04-14 삼성전자주식회사 식각 공정을 이용하는 집적회로 소자의 제조 방법
US20250014909A1 (en) * 2021-12-01 2025-01-09 Lam Research Corporation Selective etch using fluorocarbon-based deposition of a metalloid or metal
US20250054760A1 (en) * 2022-01-11 2025-02-13 Lam Research Corporation Carbon mask deposition
WO2023215385A1 (en) * 2022-05-05 2023-11-09 Lam Research Corporation Organochloride etch with passivation and profile control
US20240105499A1 (en) * 2022-09-28 2024-03-28 Applied Materials, Inc. Molecular layer deposition carbon masks for direct selective deposition of silicon-containing materials
US12469715B2 (en) 2022-10-13 2025-11-11 Applied Materials, Inc. Dry etching with etch byproduct self-cleaning
CN120129768A (zh) * 2022-10-24 2025-06-10 朗姆研究公司 可控制碳pecvd膜沉积
WO2025117301A1 (en) * 2023-11-27 2025-06-05 Lam Research Corporation SELECTIVE ETCH OF STACK USING A HYDROGEN CONTAINING COMPONENT AND AT LEAST ONE OF SeF6, AND IF7 AND TeF6

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030232504A1 (en) * 2002-06-14 2003-12-18 Aaron Eppler Process for etching dielectric films with improved resist and/or etch profile characteristics

Family Cites Families (128)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US127416A (en) * 1872-06-04 Improvement in wringing-mops
US35826A (en) * 1862-07-08 Improvement in steam-engines
US53475A (en) * 1866-03-27 Improvement in bee-hives
US99078A (en) * 1870-01-25 Improvement in cartridges
US198015A (en) * 1877-12-11 Improvement in railway air-brakes
US44722A (en) * 1864-10-18 Improvement in pneumatic drills
US26431A (en) * 1859-12-13 John s
US259355A (en) * 1882-06-13 Caleb b
US42198A (en) * 1864-04-05 Improved window blind and curtain fixture
US23475A (en) * 1859-04-05 Improvement in metallic cotton-bands
US207207A (en) * 1878-08-20 Improvement in carving-machines
US31540A (en) * 1861-02-26 Improvement in binding attachments to harvesters
US9215A (en) * 1852-08-24 Bed for invalids
US5631A (en) * 1848-06-13 Pianoeobte
US106257A (en) * 1870-08-09 Improvement in machines for soldering metallic vessels
US232504A (en) * 1880-09-21 Geefoed
US209520A (en) * 1878-10-29 Improvement in wire-holders for making fence-cables
US164478A (en) * 1875-06-15 Improvement in permanent flour of camphor
US94641A (en) * 1869-09-07 Improvement in wind-wheels
US43623A (en) * 1864-07-19 Improved ox-shoe
US148144A (en) * 1874-03-03 Improvement in lamp-chimney holders
US534A (en) * 1837-12-26 Improved steam-generator
US4234362A (en) * 1978-11-03 1980-11-18 International Business Machines Corporation Method for forming an insulator between layers of conductive material
US4508579A (en) * 1981-03-30 1985-04-02 International Business Machines Corporation Lateral device structures using self-aligned fabrication techniques
US4432132A (en) * 1981-12-07 1984-02-21 Bell Telephone Laboratories, Incorporated Formation of sidewall oxide layers by reactive oxygen ion etching to define submicron features
US4419809A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Fabrication process of sub-micrometer channel length MOSFETs
DE3242113A1 (de) * 1982-11-13 1984-05-24 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren zur herstellung einer duennen dielektrischen isolation in einem siliciumhalbleiterkoerper
US4570325A (en) * 1983-12-16 1986-02-18 Kabushiki Kaisha Toshiba Manufacturing a field oxide region for a semiconductor device
US4615764A (en) * 1984-11-05 1986-10-07 Allied Corporation SF6/nitriding gas/oxidizer plasma etch system
US4855017A (en) * 1985-05-03 1989-08-08 Texas Instruments Incorporated Trench etch process for a single-wafer RIE dry etch reactor
US4648937A (en) * 1985-10-30 1987-03-10 International Business Machines Corporation Method of preventing asymmetric etching of lines in sub-micrometer range sidewall images transfer
GB8528967D0 (en) 1985-11-25 1986-01-02 Plessey Co Plc Semiconductor device manufacture
US4687543A (en) * 1986-02-21 1987-08-18 Tegal Corporation Selective plasma etching during formation of integrated circuitry
US5514885A (en) * 1986-10-09 1996-05-07 Myrick; James J. SOI methods and apparatus
US4838991A (en) * 1987-10-30 1989-06-13 International Business Machines Corporation Process for defining organic sidewall structures
US4776922A (en) * 1987-10-30 1988-10-11 International Business Machines Corporation Formation of variable-width sidewall structures
DD280851A1 (de) 1989-03-27 1990-07-18 Dresden Forschzentr Mikroelek Verfahren zur herstellung von graben-speicherzellen
US5017403A (en) * 1989-04-13 1991-05-21 Massachusetts Institute Of Technology Process for forming planarized films
US5013400A (en) * 1990-01-30 1991-05-07 General Signal Corporation Dry etch process for forming champagne profiles, and dry etch apparatus
US5021121A (en) * 1990-02-16 1991-06-04 Applied Materials, Inc. Process for RIE etching silicon dioxide
US5328810A (en) * 1990-05-07 1994-07-12 Micron Technology, Inc. Method for reducing, by a factor or 2-N, the minimum masking pitch of a photolithographic process
US5013398A (en) * 1990-05-29 1991-05-07 Micron Technology, Inc. Anisotropic etch method for a sandwich structure
US5022958A (en) * 1990-06-27 1991-06-11 At&T Bell Laboratories Method of etching for integrated circuits with planarized dielectric
IT1243919B (it) 1990-11-20 1994-06-28 Cons Ric Microelettronica Procedimento per l'ottenimento di solchi submicrometrici planarizzati in circuiti integrati realizzati con tecnologia ulsi
JP3038950B2 (ja) * 1991-02-12 2000-05-08 ソニー株式会社 ドライエッチング方法
US6171974B1 (en) * 1991-06-27 2001-01-09 Applied Materials, Inc. High selectivity oxide etch process for integrated circuit structures
US5269879A (en) * 1991-10-16 1993-12-14 Lam Research Corporation Method of etching vias without sputtering of underlying electrically conductive layer
US5445712A (en) * 1992-03-25 1995-08-29 Sony Corporation Dry etching method
JPH05343370A (ja) 1992-06-10 1993-12-24 Toshiba Corp 微細パタ−ンの形成方法
US5423936A (en) * 1992-10-19 1995-06-13 Hitachi, Ltd. Plasma etching system
US5426070A (en) * 1993-05-26 1995-06-20 Cornell Research Foundation, Inc. Microstructures and high temperature isolation process for fabrication thereof
US5798830A (en) * 1993-06-17 1998-08-25 Ultrapointe Corporation Method of establishing thresholds for image comparison
US6042998A (en) * 1993-09-30 2000-03-28 The University Of New Mexico Method and apparatus for extending spatial frequencies in photolithography images
US5529657A (en) * 1993-10-04 1996-06-25 Tokyo Electron Limited Plasma processing apparatus
JPH0855920A (ja) 1994-08-15 1996-02-27 Toshiba Corp 半導体装置の製造方法
JPH0855908A (ja) 1994-08-17 1996-02-27 Toshiba Corp 半導体装置
JP3778299B2 (ja) * 1995-02-07 2006-05-24 東京エレクトロン株式会社 プラズマエッチング方法
US5795830A (en) * 1995-06-06 1998-08-18 International Business Machines Corporation Reducing pitch with continuously adjustable line and space dimensions
US5820261A (en) * 1995-07-26 1998-10-13 Applied Materials, Inc. Method and apparatus for infrared pyrometer calibration in a rapid thermal processing system
US5626716A (en) * 1995-09-29 1997-05-06 Lam Research Corporation Plasma etching of semiconductors
US5882535A (en) * 1997-02-04 1999-03-16 Micron Technology, Inc. Method for forming a hole in a semiconductor device
JP3257587B2 (ja) * 1997-05-23 2002-02-18 日本電気株式会社 誘電体膜を用いた半導体装置の製造方法
US6090304A (en) * 1997-08-28 2000-07-18 Lam Research Corporation Methods for selective plasma etch
JPH1197414A (ja) * 1997-09-25 1999-04-09 Sony Corp 酸化シリコン系絶縁膜のプラズマエッチング方法
US6063688A (en) * 1997-09-29 2000-05-16 Intel Corporation Fabrication of deep submicron structures and quantum wire transistors using hard-mask transistor width definition
US6291334B1 (en) * 1997-12-19 2001-09-18 Applied Materials, Inc. Etch stop layer for dual damascene process
US6159862A (en) * 1997-12-27 2000-12-12 Tokyo Electron Ltd. Semiconductor processing method and system using C5 F8
US6635185B2 (en) * 1997-12-31 2003-10-21 Alliedsignal Inc. Method of etching and cleaning using fluorinated carbonyl compounds
US6004862A (en) * 1998-01-20 1999-12-21 Advanced Micro Devices, Inc. Core array and periphery isolation technique
US6403488B1 (en) * 1998-03-19 2002-06-11 Cypress Semiconductor Corp. Selective SAC etch process
JP3744680B2 (ja) * 1998-03-31 2006-02-15 富士通株式会社 電源装置、および電源回路の制御方法
US6117786A (en) * 1998-05-05 2000-09-12 Lam Research Corporation Method for etching silicon dioxide using fluorocarbon gas chemistry
US6245662B1 (en) * 1998-07-23 2001-06-12 Applied Materials, Inc. Method of producing an interconnect structure for an integrated circuit
US6114250A (en) * 1998-08-17 2000-09-05 Lam Research Corporation Techniques for etching a low capacitance dielectric layer on a substrate
US6242165B1 (en) * 1998-08-28 2001-06-05 Micron Technology, Inc. Supercritical compositions for removal of organic material and methods of using same
US6284149B1 (en) * 1998-09-18 2001-09-04 Applied Materials, Inc. High-density plasma etching of carbon-based low-k materials in a integrated circuit
US6071789A (en) * 1998-11-10 2000-06-06 Vanguard International Semiconductor Corporation Method for simultaneously fabricating a DRAM capacitor and metal interconnections
US6191043B1 (en) * 1999-04-20 2001-02-20 Lam Research Corporation Mechanism for etching a silicon layer in a plasma processing chamber to form deep openings
US20050099078A1 (en) * 1999-05-03 2005-05-12 Serge Vanhaelemeersch Method for removal of SiC
DE69920665T2 (de) * 1999-05-25 2005-10-06 Ferrania S.P.A., Cairo Montenotte Farbphotographische lichtempfindliche Silberhalogenidelemente mit verbesserter Bildqualität
US6297126B1 (en) * 1999-07-12 2001-10-02 Chartered Semiconductor Manufacturing Ltd. Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts
US6716758B1 (en) * 1999-08-25 2004-04-06 Micron Technology, Inc. Aspect ratio controlled etch selectivity using time modulated DC bias voltage
US6291331B1 (en) * 1999-10-04 2001-09-18 Taiwan Semiconductor Manufacturing Company Re-deposition high compressive stress PECVD oxide film after IMD CMP process to solve more than 5 metal stack via process IMD crack issue
US20050022839A1 (en) * 1999-10-20 2005-02-03 Savas Stephen E. Systems and methods for photoresist strip and residue treatment in integrated circuit manufacturing
US6582891B1 (en) * 1999-12-02 2003-06-24 Axcelis Technologies, Inc. Process for reducing edge roughness in patterned photoresist
KR100311050B1 (ko) * 1999-12-14 2001-11-05 윤종용 커패시터의 전극 제조 방법
US6573030B1 (en) * 2000-02-17 2003-06-03 Applied Materials, Inc. Method for depositing an amorphous carbon layer
US6297554B1 (en) * 2000-03-10 2001-10-02 United Microelectronics Corp. Dual damascene interconnect structure with reduced parasitic capacitance
US6784108B1 (en) * 2000-08-31 2004-08-31 Micron Technology, Inc. Gas pulsing for etch profile control
SE517275C2 (sv) * 2000-09-20 2002-05-21 Obducat Ab Sätt vid våtetsning av ett substrat
JP2002110647A (ja) * 2000-09-29 2002-04-12 Hitachi Ltd 半導体集積回路装置の製造方法
US20040043475A1 (en) 2000-10-03 2004-03-04 Friedrich Proll Exhaust gas purification system
US20040035826A1 (en) 2000-12-21 2004-02-26 Kenji Adachi Etching method for insulating film
KR100439025B1 (ko) * 2001-01-18 2004-07-03 삼성전자주식회사 플래쉬 메모리의 부유 전극의 형성 방법
US7132363B2 (en) * 2001-03-27 2006-11-07 Advanced Micro Devices, Inc. Stabilizing fluorine etching of low-k materials
US6475867B1 (en) * 2001-04-02 2002-11-05 Advanced Micro Devices, Inc. Method of forming integrated circuit features by oxidation of titanium hard mask
US6740594B2 (en) 2001-05-31 2004-05-25 Infineon Technologies Ag Method for removing carbon-containing polysilane from a semiconductor without stripping
US6746961B2 (en) * 2001-06-19 2004-06-08 Lam Research Corporation Plasma etching of dielectric layer with etch profile control
EP1282159B1 (en) * 2001-07-23 2004-09-29 Infineon Technologies AG Method of forming an isolation layer and method of manufacturing a trench capacitor
TW497138B (en) * 2001-08-28 2002-08-01 Winbond Electronics Corp Method for improving consistency of critical dimension
KR100415088B1 (ko) * 2001-10-15 2004-01-13 주식회사 하이닉스반도체 반도체장치의 제조방법
US6759180B2 (en) 2002-04-23 2004-07-06 Hewlett-Packard Development Company, L.P. Method of fabricating sub-lithographic sized line and space patterns for nano-imprinting lithography
US6951709B2 (en) * 2002-05-03 2005-10-04 Micron Technology, Inc. Method of fabricating a semiconductor multilevel interconnect structure
US6649532B1 (en) * 2002-05-09 2003-11-18 Applied Materials Inc. Methods for etching an organic anti-reflective coating
KR20040012451A (ko) 2002-05-14 2004-02-11 어플라이드 머티어리얼스, 인코포레이티드 포토리소그래픽 레티클을 에칭하는 방법
US6734107B2 (en) * 2002-06-12 2004-05-11 Macronix International Co., Ltd. Pitch reduction in semiconductor fabrication
US6924191B2 (en) * 2002-06-20 2005-08-02 Applied Materials, Inc. Method for fabricating a gate structure of a field effect transistor
US6835663B2 (en) * 2002-06-28 2004-12-28 Infineon Technologies Ag Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch resistivity
US6673684B1 (en) * 2002-07-31 2004-01-06 Advanced Micro Devices, Inc. Use of diamond as a hard mask material
US6764949B2 (en) * 2002-07-31 2004-07-20 Advanced Micro Devices, Inc. Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication
JP2004087738A (ja) * 2002-08-26 2004-03-18 Tokyo Electron Ltd Ｓｉエッチング方法
US6756284B2 (en) * 2002-09-18 2004-06-29 Silicon Storage Technology, Inc. Method for forming a sublithographic opening in a semiconductor process
US7119020B2 (en) * 2002-12-04 2006-10-10 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor device
US6916746B1 (en) * 2003-04-09 2005-07-12 Lam Research Corporation Method for plasma etching using periodic modulation of gas chemistry
US6773998B1 (en) * 2003-05-20 2004-08-10 Advanced Micro Devices, Inc. Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning
US6939794B2 (en) * 2003-06-17 2005-09-06 Micron Technology, Inc. Boron-doped amorphous carbon film for use as a hard etch mask during the formation of a semiconductor device
JP4455936B2 (ja) * 2003-07-09 2010-04-21 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法とエッチングシステム
DE10332725A1 (de) 2003-07-18 2005-02-24 Forschungszentrum Jülich GmbH Verfahren zur selbstjustierenden Verkleinerung von Strukturen
JP3866694B2 (ja) * 2003-07-30 2007-01-10 株式会社日立ハイテクノロジーズ Ｌｓｉデバイスのエッチング方法および装置
US6995065B2 (en) * 2003-12-10 2006-02-07 International Business Machines Corporation Selective post-doping of gate structures by means of selective oxide growth
US6969895B2 (en) * 2003-12-10 2005-11-29 Headway Technologies, Inc. MRAM cell with flat topography and controlled bit line to free layer distance and method of manufacture
US7354847B2 (en) * 2004-01-26 2008-04-08 Taiwan Semiconductor Manufacturing Company Method of trimming technology
US7115993B2 (en) * 2004-01-30 2006-10-03 Tokyo Electron Limited Structure comprising amorphous carbon film and method of forming thereof
JP2005229052A (ja) * 2004-02-16 2005-08-25 Seiko Epson Corp 半導体装置の製造方法
US20060043066A1 (en) * 2004-08-26 2006-03-02 Kamp Thomas A Processes for pre-tapering silicon or silicon-germanium prior to etching shallow trenches
DE102005020060B4 (de) * 2005-04-29 2012-02-23 Advanced Micro Devices, Inc. Verfahren zum Strukturieren eines Dielektrikums mit kleinem ε unter Anwendung einer Hartmaske
KR100780944B1 (ko) * 2005-10-12 2007-12-03 삼성전자주식회사 탄소함유막 식각 방법 및 이를 이용한 반도체 소자의 제조방법
US7517804B2 (en) * 2006-08-31 2009-04-14 Micron Technologies, Inc. Selective etch chemistries for forming high aspect ratio features and associated structures

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030232504A1 (en) * 2002-06-14 2003-12-18 Aaron Eppler Process for etching dielectric films with improved resist and/or etch profile characteristics

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020131989A1 (en) * 2018-12-21 2020-06-25 Mattson Technology, Inc. Surface smoothing of workpieces
WO2021188180A1 (en) * 2020-03-16 2021-09-23 Tokyo Electron Limited Sidewall protection layer formation for substrate processing
US11232954B2 (en) 2020-03-16 2022-01-25 Tokyo Electron Limited Sidewall protection layer formation for substrate processing

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US7517804B2 (en) 2009-04-14
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