KR101065877B1 - 전자 회로 장치 - Google Patents
전자 회로 장치 Download PDFInfo
- Publication number
- KR101065877B1 KR101065877B1 KR1020097026037A KR20097026037A KR101065877B1 KR 101065877 B1 KR101065877 B1 KR 101065877B1 KR 1020097026037 A KR1020097026037 A KR 1020097026037A KR 20097026037 A KR20097026037 A KR 20097026037A KR 101065877 B1 KR101065877 B1 KR 101065877B1
- Authority
- KR
- South Korea
- Prior art keywords
- printed wiring
- wiring board
- electrode
- ball
- electrode pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/094—Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10515—Stacked components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
- H10W72/227—Multiple bumps having different sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/926—Multiple bond pads having different sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
- Combinations Of Printed Boards (AREA)
- Structure Of Printed Boards (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2007-134927 | 2007-05-22 | ||
| JP2007134927A JP5207659B2 (ja) | 2007-05-22 | 2007-05-22 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20100007998A KR20100007998A (ko) | 2010-01-22 |
| KR101065877B1 true KR101065877B1 (ko) | 2011-09-19 |
Family
ID=40032037
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020097026037A Expired - Fee Related KR101065877B1 (ko) | 2007-05-22 | 2008-05-21 | 전자 회로 장치 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7906733B2 (https=) |
| EP (1) | EP2153706A4 (https=) |
| JP (1) | JP5207659B2 (https=) |
| KR (1) | KR101065877B1 (https=) |
| CN (1) | CN101663925B (https=) |
| WO (1) | WO2008143359A1 (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5191927B2 (ja) * | 2009-02-26 | 2013-05-08 | アルプス電気株式会社 | Memsセンサ及びその製造方法 |
| US8716868B2 (en) | 2009-05-20 | 2014-05-06 | Panasonic Corporation | Semiconductor module for stacking and stacked semiconductor module |
| KR101671258B1 (ko) * | 2009-05-20 | 2016-11-01 | 파나소닉 아이피 매니지먼트 가부시키가이샤 | 적층형 반도체 모듈 |
| JP2011124382A (ja) * | 2009-12-10 | 2011-06-23 | Fujitsu Ltd | プリント配線基板、プリント配線基板ユニット、および電子装置 |
| JP5143211B2 (ja) | 2009-12-28 | 2013-02-13 | パナソニック株式会社 | 半導体モジュール |
| JP6091053B2 (ja) * | 2011-09-14 | 2017-03-08 | キヤノン株式会社 | 半導体装置、プリント回路板及び電子製品 |
| US9001522B2 (en) * | 2011-11-15 | 2015-04-07 | Apple Inc. | Printed circuits with staggered contact pads and compact component mounting arrangements |
| US8810020B2 (en) * | 2012-06-22 | 2014-08-19 | Freescale Semiconductor, Inc. | Semiconductor device with redistributed contacts |
| JP6177427B2 (ja) * | 2014-04-04 | 2017-08-09 | 三菱電機株式会社 | プリント配線板ユニット |
| JP6230520B2 (ja) * | 2014-10-29 | 2017-11-15 | キヤノン株式会社 | プリント回路板及び電子機器 |
| JP6772232B2 (ja) * | 2018-10-03 | 2020-10-21 | キヤノン株式会社 | プリント回路板及び電子機器 |
| WO2021083032A1 (zh) * | 2019-10-28 | 2021-05-06 | 天芯互联科技有限公司 | 封装结构及其制作方法 |
| CN110849918B (zh) * | 2019-10-31 | 2021-11-09 | 北京时代民芯科技有限公司 | 一种倒装焊器件焊点缺陷无损检测方法和系统 |
| JP7155214B2 (ja) * | 2020-09-28 | 2022-10-18 | キヤノン株式会社 | プリント回路板及び電子機器 |
| CN118629982A (zh) * | 2023-03-08 | 2024-09-10 | 群创光电股份有限公司 | 电子装置 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6501165B1 (en) * | 1998-06-05 | 2002-12-31 | Micron Technology, Inc. | Stackable semiconductor package having conductive layer and insulating layers and method of fabrication |
Family Cites Families (48)
| Publication number | Priority date | Publication date | Assignee | Title |
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| DK291184D0 (da) * | 1984-06-13 | 1984-06-13 | Boeegh Petersen Allan | Fremgangsmaade og indretning til test af kredsloebsplader |
| US5086337A (en) * | 1987-01-19 | 1992-02-04 | Hitachi, Ltd. | Connecting structure of electronic part and electronic device using the structure |
| US5012502A (en) * | 1990-06-18 | 1991-04-30 | Irt Corporation | Method for determining degree of interconnection of solder joints using X-ray inspection |
| US5811982A (en) * | 1995-11-27 | 1998-09-22 | International Business Machines Corporation | High density cantilevered probe for electronic devices |
| JP2710544B2 (ja) * | 1993-09-30 | 1998-02-10 | インターナショナル・ビジネス・マシーンズ・コーポレイション | プローブ構造、プローブ構造の形成方法 |
| CA2113752C (en) * | 1994-01-19 | 1999-03-02 | Stephen Michael Rooks | Inspection system for cross-sectional imaging |
| US5400220A (en) * | 1994-05-18 | 1995-03-21 | Dell Usa, L.P. | Mechanical printed circuit board and ball grid array interconnect apparatus |
| US5802699A (en) * | 1994-06-07 | 1998-09-08 | Tessera, Inc. | Methods of assembling microelectronic assembly with socket for engaging bump leads |
| US5477933A (en) * | 1994-10-24 | 1995-12-26 | At&T Corp. | Electronic device interconnection techniques |
| JPH08236586A (ja) * | 1994-12-29 | 1996-09-13 | Nitto Denko Corp | 半導体装置及びその製造方法 |
| JPH0951017A (ja) * | 1995-08-04 | 1997-02-18 | Fujitsu Ltd | 半導体モジュール |
| KR0182073B1 (ko) * | 1995-12-22 | 1999-03-20 | 황인길 | 반도체 칩 스케일 반도체 패키지 및 그 제조방법 |
| JPH09214088A (ja) | 1996-01-31 | 1997-08-15 | Sumitomo Kinzoku Electro Device:Kk | セラミック基板のプリント配線基板への実装構造 |
| JPH09219583A (ja) | 1996-02-09 | 1997-08-19 | Hitachi Ltd | はんだバンプの接続方法 |
| US6880245B2 (en) * | 1996-03-12 | 2005-04-19 | International Business Machines Corporation | Method for fabricating a structure for making contact with an IC device |
| US6086386A (en) * | 1996-05-24 | 2000-07-11 | Tessera, Inc. | Flexible connectors for microelectronic elements |
| US5953816A (en) * | 1997-07-16 | 1999-09-21 | General Dynamics Information Systems, Inc. | Process of making interposers for land grip arrays |
| JPH1154884A (ja) * | 1997-08-06 | 1999-02-26 | Nec Corp | 半導体装置の実装構造 |
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| US6050832A (en) * | 1998-08-07 | 2000-04-18 | Fujitsu Limited | Chip and board stress relief interposer |
| US6344752B1 (en) * | 1998-08-12 | 2002-02-05 | Tokyo Electron Limited | Contactor and production method for contractor |
| DE19839760A1 (de) * | 1998-09-01 | 2000-03-02 | Bosch Gmbh Robert | Verfahren zur Verbindung von elektronischen Bauelementen mit einem Trägersubstrat sowie Verfahren zur Überprüfung einer derartigen Verbindung |
| JP2001068836A (ja) * | 1999-08-27 | 2001-03-16 | Mitsubishi Electric Corp | プリント配線基板及び半導体モジュール並びに半導体モジュールの製造方法 |
| US6380060B1 (en) * | 2000-03-08 | 2002-04-30 | Tessera, Inc. | Off-center solder ball attach and methods therefor |
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| WO2005065207A2 (en) * | 2003-12-30 | 2005-07-21 | Tessera, Inc. | Microelectronic packages and methods therefor |
| EP1617714B1 (en) * | 2004-07-16 | 2008-09-10 | STMicroelectronics S.A. | Electronic circuit assembly, device comprising such assembly and method for fabricating such device |
| US7105918B2 (en) * | 2004-07-29 | 2006-09-12 | Micron Technology, Inc. | Interposer with flexible solder pad elements and methods of manufacturing the same |
| US7317249B2 (en) * | 2004-12-23 | 2008-01-08 | Tessera, Inc. | Microelectronic package having stacked semiconductor devices and a process for its fabrication |
| US7462939B2 (en) * | 2005-10-20 | 2008-12-09 | Honeywell International Inc. | Interposer for compliant interfacial coupling |
| TW200737506A (en) * | 2006-03-07 | 2007-10-01 | Sanyo Electric Co | Semiconductor device and manufacturing method of the same |
| US7687391B2 (en) * | 2006-09-27 | 2010-03-30 | International Business Machines Corporation | Electrically optimized and structurally protected via structure for high speed signals |
| US7719121B2 (en) * | 2006-10-17 | 2010-05-18 | Tessera, Inc. | Microelectronic packages and methods therefor |
| US20080093749A1 (en) * | 2006-10-20 | 2008-04-24 | Texas Instruments Incorporated | Partial Solder Mask Defined Pad Design |
-
2007
- 2007-05-22 JP JP2007134927A patent/JP5207659B2/ja not_active Expired - Fee Related
-
2008
- 2008-05-21 CN CN2008800131157A patent/CN101663925B/zh not_active Expired - Fee Related
- 2008-05-21 WO PCT/JP2008/059754 patent/WO2008143359A1/en not_active Ceased
- 2008-05-21 EP EP08764770A patent/EP2153706A4/en not_active Withdrawn
- 2008-05-21 US US12/530,708 patent/US7906733B2/en not_active Expired - Fee Related
- 2008-05-21 KR KR1020097026037A patent/KR101065877B1/ko not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6501165B1 (en) * | 1998-06-05 | 2002-12-31 | Micron Technology, Inc. | Stackable semiconductor package having conductive layer and insulating layers and method of fabrication |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2153706A4 (en) | 2013-01-23 |
| CN101663925A (zh) | 2010-03-03 |
| US20100084177A1 (en) | 2010-04-08 |
| US7906733B2 (en) | 2011-03-15 |
| JP5207659B2 (ja) | 2013-06-12 |
| EP2153706A1 (en) | 2010-02-17 |
| CN101663925B (zh) | 2011-11-16 |
| JP2008294014A (ja) | 2008-12-04 |
| KR20100007998A (ko) | 2010-01-22 |
| WO2008143359A1 (en) | 2008-11-27 |
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