KR100830009B1 - 반도체 장치 - Google Patents

반도체 장치 Download PDF

Info

Publication number
KR100830009B1
KR100830009B1 KR1019990015869A KR19990015869A KR100830009B1 KR 100830009 B1 KR100830009 B1 KR 100830009B1 KR 1019990015869 A KR1019990015869 A KR 1019990015869A KR 19990015869 A KR19990015869 A KR 19990015869A KR 100830009 B1 KR100830009 B1 KR 100830009B1
Authority
KR
South Korea
Prior art keywords
delete delete
memory array
disposed
bonding pads
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019990015869A
Other languages
English (en)
Korean (ko)
Other versions
KR19990088026A (ko
Inventor
노다코이치로
카토시게노부
키쯔카와고로
미시마미치히로
Original Assignee
엘피다 메모리 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘피다 메모리 가부시키가이샤 filed Critical 엘피다 메모리 가부시키가이샤
Publication of KR19990088026A publication Critical patent/KR19990088026A/ko
Application granted granted Critical
Publication of KR100830009B1 publication Critical patent/KR100830009B1/ko
Assigned to 피에스4 뤽스코 에스.에이.알.엘. reassignment 피에스4 뤽스코 에스.에이.알.엘. 권리의 전부이전등록 Assignors: 엘피다 메모리 가부시키가이샤
Assigned to 롱이튜드 쎄미컨덕터 에스.에이.알.엘. reassignment 롱이튜드 쎄미컨덕터 에스.에이.알.엘. 권리의 전부이전등록 Assignors: 피에스4 뤽스코 에스.에이.알.엘.
Assigned to 롱기튜드 라이센싱 리미티드 reassignment 롱기튜드 라이센싱 리미티드 권리의 전부이전등록 Assignors: 롱이튜드 쎄미컨덕터 에스.에이.알.엘.
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/105—Aspects related to pads, pins or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
KR1019990015869A 1998-05-12 1999-05-03 반도체 장치 Expired - Lifetime KR100830009B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP98-128797 1998-05-12
JP12879798A JP3996267B2 (ja) 1998-05-12 1998-05-12 半導体記憶装置

Publications (2)

Publication Number Publication Date
KR19990088026A KR19990088026A (ko) 1999-12-27
KR100830009B1 true KR100830009B1 (ko) 2008-05-15

Family

ID=14993685

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990015869A Expired - Lifetime KR100830009B1 (ko) 1998-05-12 1999-05-03 반도체 장치

Country Status (4)

Country Link
US (6) US20020096694A1 (https=)
JP (1) JP3996267B2 (https=)
KR (1) KR100830009B1 (https=)
TW (1) TW429603B (https=)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19960558B4 (de) * 1999-12-15 2008-07-24 Qimonda Ag Halbleiterspeicher vom wahlfreien Zugriffstyp (DRAM)
KR100382739B1 (ko) * 2001-04-13 2003-05-09 삼성전자주식회사 비대칭 데이터 경로를 갖는 반도체 메모리 장치
KR100572322B1 (ko) * 2003-11-27 2006-04-19 삼성전자주식회사 반도체메모리장치의 비트라인 감지증폭블록의 레이아웃구조
DE102004012553A1 (de) * 2004-03-15 2005-10-13 Infineon Technologies Ag Speicherbauelement mit asymmetrischer Kontaktreihe
US8298179B2 (en) 2004-12-22 2012-10-30 Boston Scientific Scimed, Inc. Catheter assembly with tapered joints and method of manufacture
DE102005049248B4 (de) * 2005-10-14 2008-06-26 Qimonda Ag Gehäuster DRAM-Chip für Hochgeschwindigkeitsanwendungen
JP2010074018A (ja) * 2008-09-22 2010-04-02 Nec Electronics Corp 半導体装置
JP5710955B2 (ja) * 2010-12-10 2015-04-30 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
KR101198141B1 (ko) * 2010-12-21 2012-11-12 에스케이하이닉스 주식회사 반도체 메모리 장치
JP2013021528A (ja) * 2011-07-12 2013-01-31 Elpida Memory Inc 半導体装置、及び出力バッファのインピーダンスを調整する方法
CN107405059B (zh) 2015-06-26 2019-05-28 奥林巴斯株式会社 内窥镜电源供给系统
KR102571550B1 (ko) * 2018-02-14 2023-08-28 삼성전자주식회사 메모리 장치, 메모리 시스템 및 전자 장치
US11164638B2 (en) 2018-07-03 2021-11-02 Samsung Electronics Co., Ltd. Non-volatile memory device
KR102601213B1 (ko) * 2018-07-03 2023-11-10 삼성전자주식회사 비휘발성 메모리 장치 및 비휘발성 메모리 장치의 제조 방법
US11631465B2 (en) 2018-07-03 2023-04-18 Samsung Electronics Co., Ltd. Non-volatile memory device
JP2021047960A (ja) * 2019-09-19 2021-03-25 キオクシア株式会社 半導体記憶装置
US11903194B2 (en) 2021-11-17 2024-02-13 Macronix International Co., Ltd. Integrated circuit
TWI792683B (zh) * 2021-11-17 2023-02-11 旺宏電子股份有限公司 積體電路

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03116865A (ja) * 1989-09-29 1991-05-17 Hitachi Ltd 半導体記憶装置
KR960019737A (ko) * 1994-11-10 1996-06-17 사토 후미오 반도체 기억장치
JPH09148540A (ja) * 1995-11-28 1997-06-06 Mitsubishi Electric Corp 半導体装置
KR970051163A (ko) * 1995-12-21 1997-07-29 김광호 반도체 메모리장치
JPH1117131A (ja) * 1997-06-23 1999-01-22 Nec Ic Microcomput Syst Ltd 半導体メモリ装置

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5262999A (en) * 1988-06-17 1993-11-16 Hitachi, Ltd. Large scale integrated circuit for low voltage operation
US5579256A (en) * 1988-11-01 1996-11-26 Hitachi, Ltd. Semiconductor memory device and defect remedying method thereof
KR0141495B1 (ko) * 1988-11-01 1998-07-15 미다 가쓰시게 반도체 기억장치 및 그 결함구제방법
US5579258A (en) * 1991-11-28 1996-11-26 Olympus Optical Co., Ltd. Ferroelectric memory
US5567655A (en) * 1993-05-05 1996-10-22 Lsi Logic Corporation Method for forming interior bond pads having zig-zag linear arrangement
JP3299342B2 (ja) * 1993-06-11 2002-07-08 株式会社日立製作所 半導体メモリモジュール
JPH0785655A (ja) * 1993-09-16 1995-03-31 Mitsubishi Electric Corp 半導体記憶装置
JP2647023B2 (ja) * 1994-10-27 1997-08-27 日本電気株式会社 半導体記憶装置
US5661686A (en) * 1994-11-11 1997-08-26 Nkk Corporation Nonvolatile semiconductor memory
KR100197570B1 (ko) * 1995-08-31 1999-06-15 윤종용 고성능 동기 반도체 메모리 장치의 클럭 패드 배치 구조
JP3406127B2 (ja) * 1995-09-04 2003-05-12 三菱電機株式会社 半導体装置
JPH09139184A (ja) * 1995-11-15 1997-05-27 Nikon Corp 静電偏向器の製造方法
US5929454A (en) * 1996-06-12 1999-07-27 Canon Kabushiki Kaisha Position detection apparatus, electron beam exposure apparatus, and methods associated with them
JP3728015B2 (ja) * 1996-06-12 2005-12-21 キヤノン株式会社 電子ビーム露光システム及びそれを用いたデバイス製造方法
JP3796317B2 (ja) * 1996-06-12 2006-07-12 キヤノン株式会社 電子ビーム露光方法及びそれを用いたデバイス製造方法
JP3927620B2 (ja) * 1996-06-12 2007-06-13 キヤノン株式会社 電子ビーム露光方法及びそれを用いたデバイス製造方法
US5981954A (en) * 1997-01-16 1999-11-09 Canon Kabushiki Kaisha Electron beam exposure apparatus
JP3689516B2 (ja) * 1997-01-29 2005-08-31 キヤノン株式会社 電子ビーム露光装置
JPH10214779A (ja) * 1997-01-31 1998-08-11 Canon Inc 電子ビーム露光方法及び該方法を用いたデバイス製造方法
US6107636A (en) * 1997-02-07 2000-08-22 Canon Kabushiki Kaisha Electron beam exposure apparatus and its control method
US6104035A (en) * 1997-06-02 2000-08-15 Canon Kabushiki Kaisha Electron-beam exposure apparatus and method
JP3787417B2 (ja) * 1997-06-11 2006-06-21 キヤノン株式会社 電子ビーム露光方法及び電子ビーム露光装置
US6552353B1 (en) * 1998-01-05 2003-04-22 Canon Kabushiki Kaisha Multi-electron beam exposure method and apparatus and device manufacturing method
US6255155B1 (en) * 1998-04-23 2001-07-03 Hyundai Electronics Industries Co., Ltd. Nonvolatile memory and method for fabricating the same
JP4454706B2 (ja) * 1998-07-28 2010-04-21 キヤノン株式会社 電子ビーム露光方法及び装置、ならびにデバイス製造方法
JP2000049071A (ja) * 1998-07-28 2000-02-18 Canon Inc 電子ビーム露光装置及び方法、ならびにデバイス製造方法
US6559456B1 (en) * 1998-10-23 2003-05-06 Canon Kabushiki Kaisha Charged particle beam exposure method and apparatus
JP4100799B2 (ja) * 1999-01-25 2008-06-11 キヤノン株式会社 マスクパターン転写方法、マスクパターン転写装置、デバイス製造方法及び転写マスク
JP2000232053A (ja) * 1999-02-09 2000-08-22 Canon Inc マスクパターン転写方法、該マスクパターン転写方法を用いたマスクパターン転写装置及びデバイス製造方法
US6465783B1 (en) * 1999-06-24 2002-10-15 Nikon Corporation High-throughput specimen-inspection apparatus and methods utilizing multiple parallel charged particle beams and an array of multiple secondary-electron-detectors
JP4427847B2 (ja) * 1999-11-04 2010-03-10 エルピーダメモリ株式会社 ダイナミック型ｒａｍと半導体装置
US6566664B2 (en) * 2000-03-17 2003-05-20 Canon Kabushiki Kaisha Charged-particle beam exposure apparatus and device manufacturing method
JP4947841B2 (ja) * 2000-03-31 2012-06-06 キヤノン株式会社 荷電粒子線露光装置
JP4647820B2 (ja) * 2001-04-23 2011-03-09 キヤノン株式会社 荷電粒子線描画装置、および、デバイスの製造方法
JP2003031172A (ja) * 2001-07-16 2003-01-31 Nikon Corp 偏向器とその製造方法、及び荷電粒子露光装置
US6873535B1 (en) * 2004-02-04 2005-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple width and/or thickness write line in MRAM
JP4997872B2 (ja) * 2006-08-22 2012-08-08 ソニー株式会社 不揮発性半導体メモリデバイスおよびその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03116865A (ja) * 1989-09-29 1991-05-17 Hitachi Ltd 半導体記憶装置
KR960019737A (ko) * 1994-11-10 1996-06-17 사토 후미오 반도체 기억장치
JPH09148540A (ja) * 1995-11-28 1997-06-06 Mitsubishi Electric Corp 半導体装置
KR970051163A (ko) * 1995-12-21 1997-07-29 김광호 반도체 메모리장치
JPH1117131A (ja) * 1997-06-23 1999-01-22 Nec Ic Microcomput Syst Ltd 半導体メモリ装置

Also Published As

Publication number Publication date
KR19990088026A (ko) 1999-12-27
US20080265284A1 (en) 2008-10-30
US20020096694A1 (en) 2002-07-25
US20030089926A1 (en) 2003-05-15
US7400034B2 (en) 2008-07-15
US20020008254A1 (en) 2002-01-24
US20020008255A1 (en) 2002-01-24
US20050263811A1 (en) 2005-12-01
US7638871B2 (en) 2009-12-29
JPH11330410A (ja) 1999-11-30
JP3996267B2 (ja) 2007-10-24
TW429603B (en) 2001-04-11

Similar Documents

Publication Publication Date Title
US7638871B2 (en) Semiconductor device
JP3299342B2 (ja) 半導体メモリモジュール
US6426560B1 (en) Semiconductor device and memory module
KR20040065176A (ko) 반도체장치
US5627792A (en) Loc type semiconductor memory device
US5789808A (en) Semiconductor device structured to be less susceptible to power supply noise
US6504770B2 (en) Semiconductor memory
US6411160B1 (en) Semiconductor integrated circuit device
JPWO1998058410A1 (ja) 半導体記憶装置
KR20000017466A (ko) 반도체 집적회로 장치
JPH11330410A5 (https=)
JP2915312B2 (ja) 半導体集積回路装置
JP4754201B2 (ja) 半導体装置
JP3398570B2 (ja) 半導体記憶装置
JP3202188B2 (ja) 半導体装置
US6229726B1 (en) Integrated circuit chip having multiple package options
US6452860B2 (en) Semiconductor memory device having segment type word line structure
JP4450380B2 (ja) メモリを内蔵した半導体集積回路
JPH09107081A (ja) 半導体記憶装置及び半導体装置
KR100552654B1 (ko) 칩 상에서 평면적으로 비사각형의 메모리 뱅크를 갖는반도체 메모리 장치
JPH10209371A (ja) Ｉｃメモリ
JPH09102592A (ja) 半導体記憶装置
JPS60185291A (ja) 半導体集積回路装置
JPH0669454A (ja) 半導体記憶装置

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19990503

PG1501 Laying open of application
A201 Request for examination
AMND Amendment
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20040422

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 19990503

Comment text: Patent Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20050920

Patent event code: PE09021S01D

AMND Amendment
E801 Decision on dismissal of amendment
PE0801 Dismissal of amendment

Patent event code: PE08012E01D

Comment text: Decision on Dismissal of Amendment

Patent event date: 20060410

Patent event code: PE08011R01I

Comment text: Amendment to Specification, etc.

Patent event date: 20051121

Patent event code: PE08011R01I

Comment text: Amendment to Specification, etc.

Patent event date: 20040422

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 20060523

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 20050920

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I

J201 Request for trial against refusal decision
PJ0201 Trial against decision of rejection

Patent event date: 20060622

Comment text: Request for Trial against Decision on Refusal

Patent event code: PJ02012R01D

Patent event date: 20060523

Comment text: Decision to Refuse Application

Patent event code: PJ02011S01I

Appeal kind category: Appeal against decision to decline refusal

Decision date: 20070727

Appeal identifier: 2006101005427

Request date: 20060622

AMND Amendment
PB0901 Examination by re-examination before a trial

Comment text: Amendment to Specification, etc.

Patent event date: 20060721

Patent event code: PB09011R02I

Comment text: Request for Trial against Decision on Refusal

Patent event date: 20060622

Patent event code: PB09011R01I

Comment text: Amendment to Specification, etc.

Patent event date: 20051121

Patent event code: PB09011R02I

Comment text: Amendment to Specification, etc.

Patent event date: 20040422

Patent event code: PB09011R02I

B601 Maintenance of original decision after re-examination before a trial
PB0601 Maintenance of original decision after re-examination before a trial

Comment text: Report of Result of Re-examination before a Trial

Patent event code: PB06011S01D

Patent event date: 20060821

N231 Notification of change of applicant
PN2301 Change of applicant

Patent event date: 20061128

Comment text: Notification of Change of Applicant

Patent event code: PN23011R01D

J301 Trial decision

Free format text: TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL REQUESTED 20060622

Effective date: 20070727

Free format text: TRIAL NUMBER: 2006101005427; TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL REQUESTED 20060622

Effective date: 20070727

PJ1301 Trial decision

Patent event code: PJ13011S01D

Patent event date: 20070727

Comment text: Trial Decision on Objection to Decision on Refusal

Appeal kind category: Appeal against decision to decline refusal

Request date: 20060622

Decision date: 20070727

Appeal identifier: 2006101005427

PS0901 Examination by remand of revocation
S901 Examination by remand of revocation
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20070828

Patent event code: PE09021S01D

GRNO Decision to grant (after opposition)
PS0701 Decision of registration after remand of revocation

Patent event date: 20080222

Patent event code: PS07012S01D

Comment text: Decision to Grant Registration

Patent event date: 20070730

Patent event code: PS07011S01I

Comment text: Notice of Trial Decision (Remand of Revocation)

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20080508

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20080508

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
PR1001 Payment of annual fee

Payment date: 20110421

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 20120423

Start annual number: 5

End annual number: 5

FPAY Annual fee payment

Payment date: 20130502

Year of fee payment: 6

PR1001 Payment of annual fee

Payment date: 20130502

Start annual number: 6

End annual number: 6

FPAY Annual fee payment

Payment date: 20140418

Year of fee payment: 7

PR1001 Payment of annual fee

Payment date: 20140418

Start annual number: 7

End annual number: 7

FPAY Annual fee payment

Payment date: 20150416

Year of fee payment: 8

PR1001 Payment of annual fee

Payment date: 20150416

Start annual number: 8

End annual number: 8

FPAY Annual fee payment

Payment date: 20180427

Year of fee payment: 11

PR1001 Payment of annual fee

Payment date: 20180427

Start annual number: 11

End annual number: 11

EXPY Expiration of term
PC1801 Expiration of term

Termination date: 20191103

Termination category: Expiration of duration