KR100412001B1 - 반도체 기억 장치 및 그 제조 방법 - Google Patents
반도체 기억 장치 및 그 제조 방법 Download PDFInfo
- Publication number
- KR100412001B1 KR100412001B1 KR10-2001-0060506A KR20010060506A KR100412001B1 KR 100412001 B1 KR100412001 B1 KR 100412001B1 KR 20010060506 A KR20010060506 A KR 20010060506A KR 100412001 B1 KR100412001 B1 KR 100412001B1
- Authority
- KR
- South Korea
- Prior art keywords
- region
- semiconductor substrate
- gate electrode
- resistance element
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
- H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
- H10B41/44—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a control gate layer also being used as part of the peripheral transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2000-00301308 | 2000-09-29 | ||
| JP2000301308A JP4313941B2 (ja) | 2000-09-29 | 2000-09-29 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20020025814A KR20020025814A (ko) | 2002-04-04 |
| KR100412001B1 true KR100412001B1 (ko) | 2003-12-24 |
Family
ID=18782866
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2001-0060506A Expired - Fee Related KR100412001B1 (ko) | 2000-09-29 | 2001-09-28 | 반도체 기억 장치 및 그 제조 방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US6667507B2 (https=) |
| JP (1) | JP4313941B2 (https=) |
| KR (1) | KR100412001B1 (https=) |
| TW (1) | TW520569B (https=) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6713346B2 (en) * | 1999-03-01 | 2004-03-30 | Micron Technology, Inc. | Methods of forming a line of flash memory cells |
| US6624022B1 (en) * | 2000-08-29 | 2003-09-23 | Micron Technology, Inc. | Method of forming FLASH memory |
| US6590255B2 (en) * | 2000-09-29 | 2003-07-08 | Kabushiki Kaisha Toshiba | Semiconductor memory device having memory cell section and peripheral circuit section and method of manufacturing the same |
| US7064978B2 (en) * | 2002-07-05 | 2006-06-20 | Aplus Flash Technology, Inc. | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout |
| JP4030839B2 (ja) * | 2002-08-30 | 2008-01-09 | スパンション エルエルシー | メモリ集積回路装置の製造方法 |
| US7302590B2 (en) * | 2003-01-06 | 2007-11-27 | Microsoft Corporation | Systems and methods for providing time-and weight-based flexibly tolerant hardware ID |
| JP3851914B2 (ja) * | 2003-07-09 | 2006-11-29 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| US7060561B2 (en) * | 2004-02-25 | 2006-06-13 | United Microelectronics Corp. | Method for fabricating memory device |
| US7344942B2 (en) * | 2005-01-26 | 2008-03-18 | Micron Technology, Inc. | Isolation regions for semiconductor devices and their formation |
| JP4113199B2 (ja) | 2005-04-05 | 2008-07-09 | 株式会社東芝 | 半導体装置 |
| JP4129009B2 (ja) | 2005-05-31 | 2008-07-30 | 株式会社東芝 | 半導体集積回路装置 |
| JP4764160B2 (ja) * | 2005-12-21 | 2011-08-31 | 株式会社東芝 | 半導体装置 |
| JP2007311566A (ja) | 2006-05-18 | 2007-11-29 | Toshiba Corp | 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の製造方法 |
| JP2007201494A (ja) * | 2007-03-26 | 2007-08-09 | Toshiba Corp | 不揮発性半導体記憶装置 |
| KR101374317B1 (ko) | 2007-08-23 | 2014-03-14 | 삼성전자주식회사 | 저항 소자를 갖는 반도체 장치 및 그 형성방법 |
| US7910973B2 (en) | 2008-03-17 | 2011-03-22 | Kabushiki Kaisha Toshiba | Semiconductor storage device |
| JP4660567B2 (ja) * | 2008-03-18 | 2011-03-30 | 株式会社東芝 | 半導体記憶装置 |
| JP2009231445A (ja) * | 2008-03-21 | 2009-10-08 | Toshiba Corp | 半導体記憶装置 |
| JP2009267107A (ja) * | 2008-04-25 | 2009-11-12 | Toshiba Corp | 不揮発性半導体記憶装置およびその製造方法 |
| JP2010098067A (ja) | 2008-10-15 | 2010-04-30 | Toshiba Corp | 半導体装置 |
| US8284601B2 (en) | 2009-04-01 | 2012-10-09 | Samsung Electronics Co., Ltd. | Semiconductor memory device comprising three-dimensional memory cell array |
| JP2012043856A (ja) * | 2010-08-16 | 2012-03-01 | Toshiba Corp | 半導体装置およびその製造方法 |
| TWI400464B (zh) * | 2011-02-11 | 2013-07-01 | Etron Technology Inc | 具有外部測試電壓的電路 |
| JP2013207123A (ja) | 2012-03-29 | 2013-10-07 | Toshiba Corp | 半導体装置 |
| JP2015050346A (ja) * | 2013-09-02 | 2015-03-16 | 株式会社東芝 | 不揮発性半導体記憶装置およびその製造方法 |
| CN112216689A (zh) * | 2019-07-12 | 2021-01-12 | 长鑫存储技术有限公司 | 半导体结构及其制作方法 |
| KR102909210B1 (ko) * | 2020-07-14 | 2026-01-07 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 이의 동작 방법 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63160097A (ja) * | 1986-12-24 | 1988-07-02 | Toshiba Corp | 半導体不揮発性メモリ |
| KR0183877B1 (ko) * | 1996-06-07 | 1999-03-20 | 김광호 | 불휘발성 메모리 장치 및 그 제조방법 |
| US6342715B1 (en) * | 1997-06-27 | 2002-01-29 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
| JP3602691B2 (ja) | 1997-06-27 | 2004-12-15 | 株式会社東芝 | 不揮発性半導体記憶装置およびその製造方法 |
| JP3586072B2 (ja) * | 1997-07-10 | 2004-11-10 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| JP3547955B2 (ja) * | 1997-10-16 | 2004-07-28 | 株式会社ルネサステクノロジ | 半導体装置 |
| JP3742230B2 (ja) | 1998-08-28 | 2006-02-01 | 株式会社東芝 | 電流発生回路 |
| KR100275741B1 (ko) * | 1998-08-31 | 2000-12-15 | 윤종용 | 비휘발성 기억소자의 제조방법 |
| US6717233B1 (en) * | 1999-02-01 | 2004-04-06 | Bae Systems Information And Electronic Systems Integration, Inc. | Method for fabricating resistors within semiconductor integrated circuit devices |
| US6228713B1 (en) * | 1999-06-28 | 2001-05-08 | Chartered Semiconductor Manufacturing Ltd. | Self-aligned floating gate for memory application using shallow trench isolation |
| US6590255B2 (en) | 2000-09-29 | 2003-07-08 | Kabushiki Kaisha Toshiba | Semiconductor memory device having memory cell section and peripheral circuit section and method of manufacturing the same |
| JP4008651B2 (ja) | 2000-10-31 | 2007-11-14 | 株式会社東芝 | 半導体装置とその製造方法 |
-
2000
- 2000-09-29 JP JP2000301308A patent/JP4313941B2/ja not_active Expired - Fee Related
-
2001
- 2001-07-06 US US09/899,155 patent/US6667507B2/en not_active Expired - Fee Related
- 2001-09-26 TW TW090123780A patent/TW520569B/zh not_active IP Right Cessation
- 2001-09-28 KR KR10-2001-0060506A patent/KR100412001B1/ko not_active Expired - Fee Related
-
2003
- 2003-10-16 US US10/685,599 patent/US6977409B2/en not_active Expired - Fee Related
-
2005
- 2005-10-27 US US11/259,142 patent/US7361951B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20020038884A1 (en) | 2002-04-04 |
| US6977409B2 (en) | 2005-12-20 |
| TW520569B (en) | 2003-02-11 |
| US20060033151A1 (en) | 2006-02-16 |
| US6667507B2 (en) | 2003-12-23 |
| KR20020025814A (ko) | 2002-04-04 |
| JP4313941B2 (ja) | 2009-08-12 |
| JP2002110825A (ja) | 2002-04-12 |
| US7361951B2 (en) | 2008-04-22 |
| US20040081002A1 (en) | 2004-04-29 |
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