KR100273725B1 - 동기식 다이나믹 랜덤 액세스 메모리의 자동 활성화 - Google Patents
동기식 다이나믹 랜덤 액세스 메모리의 자동 활성화 Download PDFInfo
- Publication number
- KR100273725B1 KR100273725B1 KR1019970708949A KR19970708949A KR100273725B1 KR 100273725 B1 KR100273725 B1 KR 100273725B1 KR 1019970708949 A KR1019970708949 A KR 1019970708949A KR 19970708949 A KR19970708949 A KR 19970708949A KR 100273725 B1 KR100273725 B1 KR 100273725B1
- Authority
- KR
- South Korea
- Prior art keywords
- command
- memory array
- memory
- precharge
- transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/06—Address interface arrangements, e.g. address buffers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Saccharide Compounds (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US8/481,920 | 1995-06-07 | ||
| US08/481,920 US5600605A (en) | 1995-06-07 | 1995-06-07 | Auto-activate on synchronous dynamic random access memory |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19990022468A KR19990022468A (ko) | 1999-03-25 |
| KR100273725B1 true KR100273725B1 (ko) | 2000-12-15 |
Family
ID=23913920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019970708949A Expired - Fee Related KR100273725B1 (ko) | 1995-06-07 | 1996-06-04 | 동기식 다이나믹 랜덤 액세스 메모리의 자동 활성화 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US5600605A (enExample) |
| EP (1) | EP0830682B1 (enExample) |
| JP (1) | JP3240348B2 (enExample) |
| KR (1) | KR100273725B1 (enExample) |
| AT (1) | ATE205013T1 (enExample) |
| AU (1) | AU6276296A (enExample) |
| DE (1) | DE69614852T2 (enExample) |
| TW (1) | TW300308B (enExample) |
| WO (1) | WO1996041345A1 (enExample) |
Families Citing this family (96)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0895162A3 (en) * | 1992-01-22 | 1999-11-10 | Enhanced Memory Systems, Inc. | Enhanced dram with embedded registers |
| US6175901B1 (en) * | 1994-04-15 | 2001-01-16 | Micron Technology, Inc. | Method for initializing and reprogramming a control operation feature of a memory device |
| JP2705590B2 (ja) * | 1994-10-28 | 1998-01-28 | 日本電気株式会社 | 半導体記憶装置 |
| US6008823A (en) * | 1995-08-01 | 1999-12-28 | Rhoden; Desi | Method and apparatus for enhancing access to a shared memory |
| US5684978A (en) * | 1995-10-20 | 1997-11-04 | International Business Machines Corporation | Synchronous DRAM controller with memory access commands timed for optimized use of data bus |
| US6243768B1 (en) * | 1996-02-09 | 2001-06-05 | Intel Corporation | Method and apparatus for controlling data transfer between a synchronous DRAM-type memory and a system bus |
| US5587961A (en) * | 1996-02-16 | 1996-12-24 | Micron Technology, Inc. | Synchronous memory allowing early read command in write to read transitions |
| US5950219A (en) * | 1996-05-02 | 1999-09-07 | Cirrus Logic, Inc. | Memory banks with pipelined addressing and priority acknowledging and systems and methods using the same |
| KR100212142B1 (ko) * | 1996-09-12 | 1999-08-02 | 윤종용 | 매크로 명령기능을 가진 동기식 반도체 메모리장치와 매크로 명령의 저장 및 실행방법 |
| US5784582A (en) * | 1996-10-28 | 1998-07-21 | 3Com Corporation | Data processing system having memory controller for supplying current request and next request for access to the shared memory pipeline |
| US5982697A (en) * | 1996-12-02 | 1999-11-09 | Micron Technology, Inc. | Method for initializing and reprogramming a control operation feature of a memory device |
| US6230245B1 (en) | 1997-02-11 | 2001-05-08 | Micron Technology, Inc. | Method and apparatus for generating a variable sequence of memory device command signals |
| US6175894B1 (en) | 1997-03-05 | 2001-01-16 | Micron Technology, Inc. | Memory device command buffer apparatus and method and memory devices and computer systems using same |
| KR100253564B1 (ko) * | 1997-04-25 | 2000-05-01 | 김영환 | 고속 동작용 싱크로노스 디램 |
| JP3294153B2 (ja) * | 1997-05-28 | 2002-06-24 | 株式会社東芝 | 半導体メモリ |
| US5996043A (en) * | 1997-06-13 | 1999-11-30 | Micron Technology, Inc. | Two step memory device command buffer apparatus and method and memory devices and computer systems using same |
| US5825711A (en) * | 1997-06-13 | 1998-10-20 | Micron Technology, Inc. | Method and system for storing and processing multiple memory addresses |
| US6484244B1 (en) | 1997-06-17 | 2002-11-19 | Micron Technology, Inc. | Method and system for storing and processing multiple memory commands |
| US5999481A (en) * | 1997-08-22 | 1999-12-07 | Micron Technology, Inc. | Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals |
| US5856947A (en) * | 1997-08-27 | 1999-01-05 | S3 Incorporated | Integrated DRAM with high speed interleaving |
| JPH1196760A (ja) * | 1997-09-24 | 1999-04-09 | Fujitsu Ltd | 半導体記憶装置 |
| EP1019911B1 (en) * | 1997-10-10 | 2003-07-16 | Rambus Inc. | Apparatus and method for device timing compensation |
| US6202119B1 (en) | 1997-12-19 | 2001-03-13 | Micron Technology, Inc. | Method and system for processing pipelined memory commands |
| US5959929A (en) * | 1997-12-29 | 1999-09-28 | Micron Technology, Inc. | Method for writing to multiple banks of a memory device |
| EP2357564A3 (en) * | 1998-02-04 | 2011-11-23 | Panasonic Corporation | Memory control unit and memory control method and medium containing program for realizing the same |
| JP3313641B2 (ja) * | 1998-02-27 | 2002-08-12 | エヌイーシーマイクロシステム株式会社 | 半導体記憶装置 |
| JPH11297072A (ja) * | 1998-04-13 | 1999-10-29 | Nec Corp | 半導体記憶装置とその制御方法 |
| US5963481A (en) * | 1998-06-30 | 1999-10-05 | Enhanced Memory Systems, Inc. | Embedded enhanced DRAM, and associated method |
| US6175905B1 (en) | 1998-07-30 | 2001-01-16 | Micron Technology, Inc. | Method and system for bypassing pipelines in a pipelined memory command generator |
| US6178488B1 (en) | 1998-08-27 | 2001-01-23 | Micron Technology, Inc. | Method and apparatus for processing pipelined memory commands |
| JP3362775B2 (ja) * | 1998-12-25 | 2003-01-07 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Dram及びdramのデータ・アクセス方法 |
| US6330636B1 (en) | 1999-01-29 | 2001-12-11 | Enhanced Memory Systems, Inc. | Double data rate synchronous dynamic random access memory device incorporating a static RAM cache per memory bank |
| JP2000268565A (ja) * | 1999-03-16 | 2000-09-29 | Toshiba Corp | 同期型半導体記憶装置 |
| US6542159B1 (en) * | 1999-05-19 | 2003-04-01 | Ati International S.R.L. | Apparatus to control memory accesses in a video system and method thereof |
| KR100336838B1 (ko) * | 1999-06-17 | 2002-05-16 | 윤종용 | 리프레시 주기 선택 회로 및 입/출력 비트 폭 선택 회로를 구비한 다이내믹 랜덤 액세스 메모리 장치 |
| US6469703B1 (en) | 1999-07-02 | 2002-10-22 | Ati International Srl | System of accessing data in a graphics system and method thereof |
| DE10004110B4 (de) * | 2000-01-31 | 2005-12-08 | Infineon Technologies Ag | Verfahren und Schaltungsanordnung zur Lese/Schreibsteuerung eines synchronen Speichers |
| US6348827B1 (en) | 2000-02-10 | 2002-02-19 | International Business Machines Corporation | Programmable delay element and synchronous DRAM using the same |
| US7073014B1 (en) | 2000-07-28 | 2006-07-04 | Micron Technology, Inc. | Synchronous non-volatile memory system |
| US6615307B1 (en) * | 2000-05-10 | 2003-09-02 | Micron Technology, Inc. | Flash with consistent latency for read operations |
| US6654847B1 (en) | 2000-06-30 | 2003-11-25 | Micron Technology, Inc. | Top/bottom symmetrical protection scheme for flash |
| US6851026B1 (en) | 2000-07-28 | 2005-02-01 | Micron Technology, Inc. | Synchronous flash memory with concurrent write and read operation |
| US6314049B1 (en) | 2000-03-30 | 2001-11-06 | Micron Technology, Inc. | Elimination of precharge operation in synchronous flash memory |
| US6785764B1 (en) | 2000-05-11 | 2004-08-31 | Micron Technology, Inc. | Synchronous flash memory with non-volatile mode register |
| US6728161B1 (en) | 2000-06-30 | 2004-04-27 | Micron Technology, Inc. | Zero latency-zero bus turnaround synchronous flash memory |
| JP2001357670A (ja) * | 2000-04-14 | 2001-12-26 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US6470433B1 (en) * | 2000-04-29 | 2002-10-22 | Hewlett-Packard Company | Modified aggressive precharge DRAM controller |
| US6785765B1 (en) | 2000-06-30 | 2004-08-31 | Micron Technology, Inc. | Status register to improve initialization of a synchronous memory |
| US6442076B1 (en) | 2000-06-30 | 2002-08-27 | Micron Technology, Inc. | Flash memory with multiple status reading capability |
| US20050135180A1 (en) * | 2000-06-30 | 2005-06-23 | Micron Technology, Inc. | Interface command architecture for synchronous flash memory |
| US6675255B1 (en) | 2000-06-30 | 2004-01-06 | Micron Technology, Inc. | Device initialize command for a synchronous memory |
| US6278654B1 (en) | 2000-06-30 | 2001-08-21 | Micron Technology, Inc. | Active terminate command in synchronous flash memory |
| US6697907B1 (en) | 2000-06-30 | 2004-02-24 | Micron Technology, Inc. | Hardware initialization of a synchronous memory |
| US6304497B1 (en) | 2000-06-30 | 2001-10-16 | Micron Technology, Inc. | Synchronous memory status register |
| US6396728B1 (en) | 2000-07-28 | 2002-05-28 | Micron Technology, Inc. | Array organization for high-performance memory devices |
| US6307779B1 (en) | 2000-07-28 | 2001-10-23 | Micron Technology, Inc. | Method and circuitry for bank tracking in write command sequence |
| US6366524B1 (en) | 2000-07-28 | 2002-04-02 | Micron Technology Inc. | Address decoding in multiple-bank memory architectures |
| US6883044B1 (en) | 2000-07-28 | 2005-04-19 | Micron Technology, Inc. | Synchronous flash memory with simultaneous access to one or more banks |
| US6728798B1 (en) * | 2000-07-28 | 2004-04-27 | Micron Technology, Inc. | Synchronous flash memory with status burst output |
| US6246626B1 (en) | 2000-07-28 | 2001-06-12 | Micron Technology, Inc. | Protection after brown out in a synchronous memory |
| US6496425B1 (en) | 2000-08-21 | 2002-12-17 | Micron Technology, Inc | Multiple bit line column redundancy |
| US6445603B1 (en) | 2000-08-21 | 2002-09-03 | Micron Technology, Inc. | Architecture, package orientation and assembly of memory devices |
| US6359821B1 (en) | 2000-08-25 | 2002-03-19 | Micron Technology, Inc. | Differential sensing in a memory with reference current |
| US6580659B1 (en) | 2000-08-25 | 2003-06-17 | Micron Technology, Inc. | Burst read addressing in a non-volatile memory device |
| US6504768B1 (en) | 2000-08-25 | 2003-01-07 | Micron Technology, Inc. | Redundancy selection in memory devices with concurrent read and write |
| US6275446B1 (en) | 2000-08-25 | 2001-08-14 | Micron Technology, Inc. | Clock generation circuits and methods |
| US6304488B1 (en) | 2000-08-25 | 2001-10-16 | Micron Technology, Inc. | Current limiting negative switch circuit |
| US6507525B1 (en) | 2000-08-25 | 2003-01-14 | Micron Technology, Inc. | Differential sensing in a memory |
| US6877100B1 (en) * | 2000-08-25 | 2005-04-05 | Micron Technology, Inc. | Adjustable timing circuit of an integrated circuit by selecting and moving clock edges based on a signal propagation time stored in a programmable non-volatile fuse circuit |
| US6496434B1 (en) | 2000-08-25 | 2002-12-17 | Micron Technology Inc. | Differential sensing in a memory using two cycle pre-charge |
| US6310809B1 (en) | 2000-08-25 | 2001-10-30 | Micron Technology, Inc. | Adjustable pre-charge in a memory |
| US6327202B1 (en) | 2000-08-25 | 2001-12-04 | Micron Technology, Inc. | Bit line pre-charge in a memory |
| US6711701B1 (en) | 2000-08-25 | 2004-03-23 | Micron Technology, Inc. | Write and erase protection in a synchronous memory |
| US6691204B1 (en) * | 2000-08-25 | 2004-02-10 | Micron Technology, Inc. | Burst write in a non-volatile memory device |
| US6541849B1 (en) * | 2000-08-25 | 2003-04-01 | Micron Technology, Inc. | Memory device power distribution |
| US6445625B1 (en) | 2000-08-25 | 2002-09-03 | Micron Technology, Inc. | Memory device redundancy selection having test inputs |
| US6307790B1 (en) | 2000-08-30 | 2001-10-23 | Micron Technology, Inc. | Read compression in a memory |
| US6304510B1 (en) | 2000-08-31 | 2001-10-16 | Micron Technology, Inc. | Memory device address decoding |
| US6728150B2 (en) | 2002-02-11 | 2004-04-27 | Micron Technology, Inc. | Method and apparatus for supplementary command bus |
| US6690606B2 (en) * | 2002-03-19 | 2004-02-10 | Micron Technology, Inc. | Asynchronous interface circuit and method for a pseudo-static memory device |
| US6928026B2 (en) * | 2002-03-19 | 2005-08-09 | Broadcom Corporation | Synchronous global controller for enhanced pipelining |
| JP2003308246A (ja) * | 2002-04-17 | 2003-10-31 | Fujitsu Ltd | メモリコントローラのクロック制御装置及び方法 |
| US7251711B2 (en) * | 2002-05-28 | 2007-07-31 | Micron Technology, Inc. | Apparatus and methods having a command sequence |
| US6920524B2 (en) | 2003-02-03 | 2005-07-19 | Micron Technology, Inc. | Detection circuit for mixed asynchronous and synchronous memory operation |
| CA2479868A1 (en) * | 2003-09-02 | 2005-03-02 | Ronald E. Brick | Light fixture |
| US7560956B2 (en) * | 2005-08-03 | 2009-07-14 | Micron Technology, Inc. | Method and apparatus for selecting an operating mode based on a determination of the availability of internal clock signals |
| JP4848564B2 (ja) * | 2005-09-29 | 2011-12-28 | 株式会社ハイニックスセミコンダクター | 半導体メモリ装置のリセット制御回路 |
| US7286423B2 (en) * | 2006-02-27 | 2007-10-23 | Freescale Semiconductor, Inc. | Bit line precharge in embedded memory |
| US7436708B2 (en) * | 2006-03-01 | 2008-10-14 | Micron Technology, Inc. | NAND memory device column charging |
| US7440335B2 (en) * | 2006-05-23 | 2008-10-21 | Freescale Semiconductor, Inc. | Contention-free hierarchical bit line in embedded memory and method thereof |
| US7729191B2 (en) * | 2007-09-06 | 2010-06-01 | Micron Technology, Inc. | Memory device command decoding system and memory device and processor-based system using same |
| KR101198139B1 (ko) * | 2010-11-23 | 2012-11-12 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치의 프리차지 신호 발생 회로 |
| US9202551B2 (en) * | 2012-06-28 | 2015-12-01 | Intel Corporation | Flexible command addressing for memory |
| CN103927286B (zh) * | 2013-01-16 | 2018-05-15 | 森富科技股份有限公司 | 降低反射讯号的内存结构 |
| CN113299328B (zh) * | 2021-05-21 | 2024-07-09 | 深圳市格灵精睿视觉有限公司 | 随机寻址读写控制方法、控制系统及存储介质 |
| US11600312B1 (en) | 2021-08-16 | 2023-03-07 | Micron Technology, Inc. | Activate commands for memory preparation |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5257233A (en) * | 1990-10-31 | 1993-10-26 | Micron Technology, Inc. | Low power memory module using restricted RAM activation |
| US5229969A (en) * | 1991-04-15 | 1993-07-20 | Micron Technology, Inc. | Method for synchronizing refresh cycles in self-refreshing DRAMs having timing circuit shutdown |
| US5208779A (en) * | 1991-04-15 | 1993-05-04 | Micron Technology, Inc. | Circuit for providing synchronous refresh cycles in self-refreshing interruptable DRAMs |
| US5229970A (en) * | 1991-04-15 | 1993-07-20 | Micron Technology, Inc. | Circuit for synchronizing refresh cycles in self-refreshing drams having timing circuit shutdown |
| US5335201A (en) * | 1991-04-15 | 1994-08-02 | Micron Technology, Inc. | Method for providing synchronous refresh cycles in self-refreshing interruptable DRAMs |
| JP2740097B2 (ja) * | 1992-03-19 | 1998-04-15 | 株式会社東芝 | クロック同期型半導体記憶装置およびそのアクセス方法 |
| JP2605576B2 (ja) * | 1993-04-02 | 1997-04-30 | 日本電気株式会社 | 同期型半導体メモリ |
| JP3244340B2 (ja) * | 1993-05-24 | 2002-01-07 | 三菱電機株式会社 | 同期型半導体記憶装置 |
| JP2697568B2 (ja) * | 1993-08-26 | 1998-01-14 | 日本電気株式会社 | 半導体記憶装置 |
-
1995
- 1995-06-07 US US08/481,920 patent/US5600605A/en not_active Expired - Lifetime
-
1996
- 1996-06-04 AT AT96921563T patent/ATE205013T1/de not_active IP Right Cessation
- 1996-06-04 KR KR1019970708949A patent/KR100273725B1/ko not_active Expired - Fee Related
- 1996-06-04 JP JP50222697A patent/JP3240348B2/ja not_active Expired - Fee Related
- 1996-06-04 DE DE69614852T patent/DE69614852T2/de not_active Expired - Lifetime
- 1996-06-04 WO PCT/US1996/010176 patent/WO1996041345A1/en not_active Ceased
- 1996-06-04 EP EP96921563A patent/EP0830682B1/en not_active Expired - Lifetime
- 1996-06-04 AU AU62762/96A patent/AU6276296A/en not_active Abandoned
- 1996-06-13 TW TW085107106A patent/TW300308B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP0830682A1 (en) | 1998-03-25 |
| JP3240348B2 (ja) | 2001-12-17 |
| US5600605A (en) | 1997-02-04 |
| ATE205013T1 (de) | 2001-09-15 |
| JP2000513478A (ja) | 2000-10-10 |
| EP0830682B1 (en) | 2001-08-29 |
| DE69614852D1 (de) | 2001-10-04 |
| KR19990022468A (ko) | 1999-03-25 |
| DE69614852T2 (de) | 2002-01-17 |
| WO1996041345A1 (en) | 1996-12-19 |
| AU6276296A (en) | 1996-12-30 |
| TW300308B (enExample) | 1997-03-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
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