DE69614852D1 - Selbst-aktivierung auf synchronem dynamischen ram speicher - Google Patents

Selbst-aktivierung auf synchronem dynamischen ram speicher

Info

Publication number
DE69614852D1
DE69614852D1 DE69614852T DE69614852T DE69614852D1 DE 69614852 D1 DE69614852 D1 DE 69614852D1 DE 69614852 T DE69614852 T DE 69614852T DE 69614852 T DE69614852 T DE 69614852T DE 69614852 D1 DE69614852 D1 DE 69614852D1
Authority
DE
Germany
Prior art keywords
command
precharge
responds
active
row address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69614852T
Other languages
English (en)
Other versions
DE69614852T2 (de
Inventor
Scott Schaefer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE69614852D1 publication Critical patent/DE69614852D1/de
Application granted granted Critical
Publication of DE69614852T2 publication Critical patent/DE69614852T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/06—Address interface arrangements, e.g. address buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Saccharide Compounds (AREA)
DE69614852T 1995-06-07 1996-06-04 Selbst-aktivierung auf synchronem dynamischen ram speicher Expired - Lifetime DE69614852T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/481,920 US5600605A (en) 1995-06-07 1995-06-07 Auto-activate on synchronous dynamic random access memory
PCT/US1996/010176 WO1996041345A1 (en) 1995-06-07 1996-06-04 Auto-activate on synchronous dynamic random access memory

Publications (2)

Publication Number Publication Date
DE69614852D1 true DE69614852D1 (de) 2001-10-04
DE69614852T2 DE69614852T2 (de) 2002-01-17

Family

ID=23913920

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69614852T Expired - Lifetime DE69614852T2 (de) 1995-06-07 1996-06-04 Selbst-aktivierung auf synchronem dynamischen ram speicher

Country Status (9)

Country Link
US (1) US5600605A (de)
EP (1) EP0830682B1 (de)
JP (1) JP3240348B2 (de)
KR (1) KR100273725B1 (de)
AT (1) ATE205013T1 (de)
AU (1) AU6276296A (de)
DE (1) DE69614852T2 (de)
TW (1) TW300308B (de)
WO (1) WO1996041345A1 (de)

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US6230245B1 (en) 1997-02-11 2001-05-08 Micron Technology, Inc. Method and apparatus for generating a variable sequence of memory device command signals
US6175894B1 (en) 1997-03-05 2001-01-16 Micron Technology, Inc. Memory device command buffer apparatus and method and memory devices and computer systems using same
KR100253564B1 (ko) * 1997-04-25 2000-05-01 김영환 고속 동작용 싱크로노스 디램
JP3294153B2 (ja) * 1997-05-28 2002-06-24 株式会社東芝 半導体メモリ
US5825711A (en) * 1997-06-13 1998-10-20 Micron Technology, Inc. Method and system for storing and processing multiple memory addresses
US5996043A (en) * 1997-06-13 1999-11-30 Micron Technology, Inc. Two step memory device command buffer apparatus and method and memory devices and computer systems using same
US6484244B1 (en) 1997-06-17 2002-11-19 Micron Technology, Inc. Method and system for storing and processing multiple memory commands
US5999481A (en) 1997-08-22 1999-12-07 Micron Technology, Inc. Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
US5856947A (en) * 1997-08-27 1999-01-05 S3 Incorporated Integrated DRAM with high speed interleaving
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US6654847B1 (en) 2000-06-30 2003-11-25 Micron Technology, Inc. Top/bottom symmetrical protection scheme for flash
US7073014B1 (en) * 2000-07-28 2006-07-04 Micron Technology, Inc. Synchronous non-volatile memory system
JP2001357670A (ja) * 2000-04-14 2001-12-26 Mitsubishi Electric Corp 半導体記憶装置
US6470433B1 (en) * 2000-04-29 2002-10-22 Hewlett-Packard Company Modified aggressive precharge DRAM controller
US6442076B1 (en) 2000-06-30 2002-08-27 Micron Technology, Inc. Flash memory with multiple status reading capability
US20050135180A1 (en) * 2000-06-30 2005-06-23 Micron Technology, Inc. Interface command architecture for synchronous flash memory
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US6278654B1 (en) 2000-06-30 2001-08-21 Micron Technology, Inc. Active terminate command in synchronous flash memory
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US6307779B1 (en) 2000-07-28 2001-10-23 Micron Technology, Inc. Method and circuitry for bank tracking in write command sequence
US6728798B1 (en) * 2000-07-28 2004-04-27 Micron Technology, Inc. Synchronous flash memory with status burst output
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US6711701B1 (en) * 2000-08-25 2004-03-23 Micron Technology, Inc. Write and erase protection in a synchronous memory
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US6580659B1 (en) * 2000-08-25 2003-06-17 Micron Technology, Inc. Burst read addressing in a non-volatile memory device
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JP4848564B2 (ja) * 2005-09-29 2011-12-28 株式会社ハイニックスセミコンダクター 半導体メモリ装置のリセット制御回路
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Also Published As

Publication number Publication date
US5600605A (en) 1997-02-04
TW300308B (de) 1997-03-11
ATE205013T1 (de) 2001-09-15
WO1996041345A1 (en) 1996-12-19
AU6276296A (en) 1996-12-30
EP0830682A1 (de) 1998-03-25
KR19990022468A (ko) 1999-03-25
JP2000513478A (ja) 2000-10-10
KR100273725B1 (ko) 2000-12-15
EP0830682B1 (de) 2001-08-29
DE69614852T2 (de) 2002-01-17
JP3240348B2 (ja) 2001-12-17

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Representative=s name: ANWALTSKANZLEI GULDE HENGELHAUPT ZIEBIG & SCHNEIDE

8364 No opposition during term of opposition