JPS6419584A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To perform fast serial operation with a simple circuit by amplifying different storage data by a memory amplifier, by switching a data line by an address counter while the output signal of a second FF is transmitted to an output circuit, in the serial readout operation of a recorder. CONSTITUTION:A memory array M-ARY in a semiconductor memory device is constituted of a word line and a complementary data line arranged in a vertical and a horizontal directions, respectively, and MOSFET type dynamic memory cells formed on respective intersection. The unit circuit of a sense amplifier SA corresponding to the data line is provided, and all sense amplifiers SA are operated simultaneously by the selection of one word line by a timing signal phipa. Also, an X address signal AX and a Y address signal AY from the outside are inputted to a load address buffer RADB, and a complementary address signal is processed at an address decoder RDCR and a multiplexer MPX. At this time, the internal address of an address counter CTR is added on the MPX, and the operation of the MPX is controlled by the signal of a timing control circuit TC.