JPWO2014199764A1 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JPWO2014199764A1 JPWO2014199764A1 JP2015522660A JP2015522660A JPWO2014199764A1 JP WO2014199764 A1 JPWO2014199764 A1 JP WO2014199764A1 JP 2015522660 A JP2015522660 A JP 2015522660A JP 2015522660 A JP2015522660 A JP 2015522660A JP WO2014199764 A1 JPWO2014199764 A1 JP WO2014199764A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 147
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 49
- 239000004840 adhesive resin Substances 0.000 claims abstract description 145
- 229920006223 adhesive resin Polymers 0.000 claims abstract description 145
- 238000000034 method Methods 0.000 claims abstract description 35
- 239000003822 epoxy resin Substances 0.000 claims description 9
- 229920000647 polyepoxide Polymers 0.000 claims description 9
- 229920001721 polyimide Polymers 0.000 claims description 7
- 239000009719 polyimide resin Substances 0.000 claims description 7
- 229920006122 polyamide resin Polymers 0.000 claims description 6
- 229920002050 silicone resin Polymers 0.000 claims description 5
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 43
- 229920005989 resin Polymers 0.000 description 23
- 239000011347 resin Substances 0.000 description 23
- 230000008569 process Effects 0.000 description 14
- 239000007788 liquid Substances 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 239000011248 coating agent Substances 0.000 description 6
- 238000000576 coating method Methods 0.000 description 6
- 239000003566 sealing material Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000001179 sorption measurement Methods 0.000 description 5
- 239000010949 copper Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- -1 polyphenol sulfide Chemical class 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- VZSRBBMJRBPUNF-UHFFFAOYSA-N 2-(2,3-dihydro-1H-inden-2-ylamino)-N-[3-oxo-3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)propyl]pyrimidine-5-carboxamide Chemical compound C1C(CC2=CC=CC=C12)NC1=NC=C(C=N1)C(=O)NCCC(N1CC2=C(CC1)NN=N2)=O VZSRBBMJRBPUNF-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 235000013824 polyphenols Nutrition 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
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- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
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- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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- H01L2224/29001—Core members of the layer connector
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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Abstract
Description
このパワー半導体モジュール50は、PPS(ポリフェノルサルファイド)樹脂で形成された枠体51と、枠体51を貫通し、枠体51の第1段差部52に埋設された端子53を備える。パワー半導体モジュール50は、枠体51の裏面側の内側に形成された第2段差部54と、この第2段差部54に嵌合され接着樹脂55で固定された回路基板56とを備える。パワー半導体モジュール50は、回路基板56にはんだ付けされた半導体チップ57と、半導体チップ57と端子53を超音波ボンディングで接続するワイヤ58と、枠体51内を充填する封止材59とを備える。回路基板56は、アルミニウムなどの金属板56cと、この金属板56c上を被覆するエポキシ樹脂などの絶縁板56bと、この絶縁板56b上に形成される回路板56aとで構成される。
この一体成型された端子53の裏面53aと、枠体51の第1段差部52の埋設箇所の底部52aの間は密着性が低い。また両者の熱膨張係数差により、図27に示すように、第1段差部52に埋設された端子53は、第1段差部52の埋設箇所の底部52aから浮き上がる場合がある。このような状態の端子53には、ワイヤボンディング時の超音波振動がうまく伝達されないため、強固なワイヤボンディングができない。そのため、ワイヤ58が端子53から剥離する不都合を生じる。
特許文献2ではケースに突出部をつけ、端子を突出部で上から押さえて固定されている。
また、特許文献4では、アンカー板に端子を接着し、ケースにアンカー板を固定する。アンカー板とケースと同じ材料にすることで互いの表面を融合させて一体化する。これによって、端子がしっかり固定されている。
また、特許文献2ではケースの突出部で上から押さえる構造を設けているが、端子下とケースの隙間は依然として残る。このことから、端子とケースとの密着性が十分確保できない場合がある。
また、特許文献4では、ケースと端子の一括成型を行う前に、端子にアンカー板を付ける工程と、その硬化工程を追加する必要があり製造コストが高くなる。
(実施例1)
図1〜図4は、第1実施例に係る半導体装置の要部構成図である。
また、半導体装置100は、半導体チップ11と、ワイヤ13と、封止材14を有する。半導体チップ11は、回路基板12の回路板12aにはんだ付けされている。ワイヤ13は、アルミや銅などで構成され、半導体チップ11と端子15とを電気的に接続している。封止材14は、枠体7内に充填され、半導体装置100の内部を封止している。また、枠体7には、取り付け孔22が設けられている。
接着樹脂8は、振動を吸収可能な弾性係数を有する材質で、液状で粘度の小さな常温処理ができる熱硬化性樹脂がよい。接着樹脂8は、例えば、エポキシ系樹脂、ポリイミド系樹脂、ポリアミド系樹脂もしくはシリコーン系樹脂がよい。
(実施例2)
図5は、第2実施例に係る半導体装置の要部構成図である。なお、図5は、第1実施例の図2に相当する図である。
(実施例3)
図6は、第3実施例に係る半導体装置の要部構成図である。なお、図6は、第2実施例の図5に相当する図である。
(実施例4)
図7は、第4実施例に係る半導体装置の要部構成図である。なお図7は、第3実施例の図6に相当する図である。
(実施例5)
図8は、第5実施例に係る半導体装置の要部構成図である。なお図8は、第4実施例の図7に相当する図である。
(実施例6)
図9は、第6実施例に係る半導体装置の要部構成図である。なお、図9は、第5実施例の図8に相当する図である。
(実施例7)
図10は、第7実施例に係る半導体装置の要部構成図である。なお、図10は、第5実施例の図8に相当する図である。
(実施例8)
図11は、第8実施例に係る半導体装置の要部構成図である。なお、図11は、第7実施例の図10に相当する図である。
(実施例9)
図12は、第9実施例に係る半導体装置の要部構成図である。なお、図12は、第1実施例の図2に相当する図である。
また、半導体装置200〜800にこの止め部30を設けることで、さらに強固な超音波ボンディングを行うことができる。
(実施例10)
図13は、第10実施例に係る半導体装置の要部構成図である。なお、図13は、第3実施例の図6に相当する図である。
(実施例11)
図14は、第11実施例に係る半導体装置の要部構成図である。なお、図14は、第10実施例の図13に相当する図である。
(実施例12)
図15は、第12実施例に係る半導体装置の要部構成図である。なお、図15は、第5実施例の図8に相当する図である。
(実施例13)
図16〜図18は、第13実施例に係る半導体装置の製造方法であり、工程順に示した要部製造工程断面図である。なお、この第13実施例は図1に示す半導体装置100の製造方法である。
次に、図16(b)に示すように、下部金型1に、例えば、Cuのリードフレーム4を配置する。
また、枠体7とリードフレーム4の一体成型において、埋設されたリードフレーム4の裏面4bが熱膨張係数の違いにより、図4に示すように、例えば70μm程度浮き上がる場合がある。しかし、この場合も粘度の低い接着樹脂8は隙間26に浸透して行き、良好な固着が得られる。
(実施例14)
図19〜図21は、第14実施例に係る半導体装置の製造方法であり、工程順に示した要部製造工程断面図である。なお、この第14実施例は、図13に示す半導体装置1000の製造方法である。
次に、図21(j)に示すように、枠体7内に封止材14を充填する。続いて、リードフレーム4の不要部分を切断した後、折り曲げて端子15を形成する。このようにして、半導体装置1000ができ上がる。
(実施例15)
図22〜図24は、第15実施例に係る半導体装置の製造方法であり、工程順に示した要部製造工程断面図である。なお、この第15実施例は、図8に示す半導体装置500の製造方法である。
次に、図22(b)に示すように、下部金型1に、例えば、Cuのリードフレーム4を配置する。この下部金型1には枠体7の第1段差部21から第2段差部9に向かって貫通孔28が形成されるように突起部28aが設けられている。
図25は、第13実施例、第14実施例及び第15実施例で用いられる接着樹脂を塗布する塗布装置の模式的な構成図である。接着樹脂の符号18,19にもこの装置は適用できる。
まず、(1)の工程において、支持台41に半導体チップ11を下にした回路基板12を載置する。
次に、(4)の工程において、移動制御部48からの指令で移動部47をX方向、Y方向に移動させて支持台41を移動させ、枠体7の第2段差部9をデスペンサー10直下に位置させる。
次に、(7)の工程において、回路基板12を下降させて、枠体7の第2段差部9に回路基板12を嵌合させる。このとき、第2段差部9に塗布された接着樹脂8は圧縮されて図18で示すようにリードフレーム4の先端の突出部4eの裏面4bまで流れてゆく。このとき端面4cまで流れるようにしてもよい。このとき接着樹脂8の塗布量が管理されているため、リードフレーム4の突出部4eの端面4cやおもて面4aまでは流れて行かないようにする。
(5)の工程において、枠体7の開口部7cの内壁7dへの接着樹脂8の排出は、排出制御部43により、接着樹脂8の排出量や排出速度が適正に制御されて、枠体7の第2段差部9に適正重量の接着樹脂8がデスペンサー10により排出される。デスペンサー10から排出された接着樹脂8は支持台41を移動させることで、均一に枠体7の第2段差部9に塗布される。この枠体7の第2段差部9の周囲長が、例えば75mm程度ある場合には、接着樹脂8の適正重量を例えば、100mg程度、排出圧力は例えば、1.5×9.8N程度にすると適正に塗布することができる。
2 上部金型
3 金型
4 リードフレーム
4a,7a,15a,21a おもて面
4b,7b,15b 裏面
4c,15c,15f 端面
4e,15e 突出部
5 注入口
6 モールド樹脂
7 枠体
7c 開口部
7d 内壁
8 接着樹脂
9 第2段差部
10 デスペンサー
11 半導体チップ
12 回路基板
12a 回路板
12b 絶縁膜
12c 金属板
13 ワイヤ
14 封止材
15 端子
15d 側面
18 第1接着樹脂
19 第2接着樹脂
21 第1段差部
22 取り付け孔
25 超音波ボンディング装置
26 隙間
27,33 空隙
28,29 貫通孔
28a 突起部
35 ボンディング箇所
41 支持台
42 取り付け支柱
43 排出制御部
44 吸着部
45 吸着部取り付け支柱
46 吸着制御部
47 移動部
48 移動制御部
100〜1200 半導体装置
150 塗布装置
(実施例6)
図9は、第6実施例に係る半導体装置の要部構成図である。なお、図9は、第5実施例の図8に相当する図である。
(実施例13)
図16〜図18は、第13実施例に係る半導体装置の製造方法であり、工程順に示した要部製造工程断面図である。なお、この第13実施例は図1に示す半導体装置100の製造方法である。
Claims (19)
- 一方の主面側の内周に環状に配置される第1段差部と、他方の主面側の内周に環状に配置される第2段差部と、前記第1段差部と前記第2段差部との間に設けられた内壁とを有する枠体と、
前記第1段差部から外部に導出された端子と、
前記第2段差部に嵌合された回路基板と、
前記第2段差部と前記回路基板とを接着し、前記内壁及び前記端子に接している接着樹脂と、
を備える半導体装置。 - 前記端子が、前記第1段差部側の先端部に、前記内壁から突出した突出部を有し、
前記接着樹脂が前記突出部の前記内壁側の面に接している、
請求項1記載の半導体装置。 - 前記接着樹脂が前記端子の前記突出部側の端面に接している、
請求項2記載の半導体装置。 - 前記端子の前記第1段差部側の先端部が前記内壁と略面一に配置され、
前記接着樹脂は、前記先端部に接している、
請求項1記載の半導体装置。 - 前記接着樹脂は、前記第1段差部面と前記第1段差部面上の前記端子との間を接着している、
請求項4記載の半導体装置。 - 一方の主面側の内周に環状に配置される第1段差部と、他方の主面側の内周に環状に配置される第2段差部と、前記第1段差部と前記第2段差部との間に設けられた内壁と、前記第1段差部と前記第2段差部とを貫通する貫通孔とを有する枠体と、
前記第1段差部から外部に導出された端子と、
前記第2段差部に嵌合された回路基板と、
前記第2段差部と前記回路基板とを接着し、前記貫通孔に充填されて前記端子に接している接着樹脂と、
を備える半導体装置。 - 前記端子の前記第1段差部側の先端部が前記内壁と略面一に配置され、
前記接着樹脂は前記内壁と前記先端部とに接している、
請求項6記載の半導体装置。 - 前記貫通孔はその幅が、前記端子の幅よりも広い、
請求項6または7記載の半導体装置。 - 前記枠体は、前記第1段差部に、前記端子を前記一方の主面側から前記他方の主面側に押圧する止め部を有する、
請求項1または2記載の半導体装置。 - 前記止め部は前記枠体と一体に形成されている、
請求項9記載の半導体装置。 - 前記接着樹脂は、
前記第2段差部と前記回路基板とを接着する第1接着樹脂と、
前記内壁及び前記端子に接している第2接着樹脂と、
を含む請求項4記載の半導体装置。 - 一方の主面側の内周に環状に配置される第1段差部と、他方の主面側の内周に環状に配置される第2段差部と、前記第1段差部と前記第2段差部との間に設けられた内壁とを有する枠体と、
前記第1段差部から外部に導出された端子と、
前記第2段差部に嵌合された回路基板と、
前記第2段差部と前記回路基板とを接着する第1接着樹脂と、
を備え、
前記枠体は、前記第1段差部内の前記端子の側部に空隙を備え、
前記空隙に第2接着樹脂が配置されている半導体装置。 - 前記接着樹脂が、エポキシ系樹脂、ポリイミド系樹脂、ポリアミド系樹脂もしくはシリコーン系樹脂のいずれかである、
請求項1記載の半導体装置。 - 一方の主面側の内周に環状に配置される第1段差部と、前記第1段差部に固定される端子と、他方の主面側の内周に環状に配置される第2段差部と、前記第1段差部と前記第2段差部との間に設けられた内壁とを有する枠体を準備する工程と、
回路基板を準備する工程と、
前記枠体を、前記一方の主面を下向きに向けて、前記第2段差部に接着樹脂を塗布する工程と、
前記第2段差部に前記回路基板を嵌合することで前記接着樹脂を押し出し、前記接着樹脂を前記内壁及び前記端子に塗布する工程と、
を有する半導体装置の製造方法。 - 前記端子の前記第1段差部側の先端部に前記内壁から突出した突出部を設け、
押し出された前記接着樹脂を前記突出部の前記内壁側の面に塗布する、
請求項14記載の半導体装置の製造方法。 - 一方の主面側の内周に環状に配置される第1段差部と、前記第1段差部に固定される端子と、他方の主面側の内周に環状に配置される第2段差部と、前記第1段差部と前記第2段差部との間に設けられた内壁とを有する枠体を準備する工程と、
回路基板を準備する工程と、
前記枠体を、前記一方の主面を下向きに向けて、前記第2段差部に第1接着樹脂を塗布する工程と、
前記第2段差部に前記回路基板を嵌合する工程と、
前記枠体を、前記一方の主面を上向きに向けて、前記内壁及び前記端子に第2接着樹脂を塗布する工程と、
を有する半導体装置の製造方法。 - 一方の主面側の内周に環状に配置される第1段差部と、前記第1段差部に固定される端子と、他方の主面側の内周に環状に配置される第2段差部と、前記第1段差部と前記第2段差部との間に設けられた内壁と、前記第1段差部と前記第2段差部とを貫通する貫通孔とを有する枠体を準備する工程と、
回路基板を準備する工程と、
前記枠体を、前記一方の主面を下向きに向けて、前記第2段差部に接着樹脂を塗布し、該接着樹脂を前記貫通孔に充填する工程と、
前記第2段差部に前記回路基板を嵌合する工程と、
を有する半導体装置の製造方法。 - 前記接着樹脂が、エポキシ系樹脂、ポリイミド系樹脂、ポリアミド系樹脂もしくはシリコーン系樹脂のいずれかである、
請求項14または17記載の半導体装置の製造方法。 - 前記第1接着樹脂及び前記第2接着樹脂が、エポキシ系樹脂、ポリイミド系樹脂、ポリアミド系樹脂もしくはシリコーン系樹脂のいずれかである、
請求項16記載の半導体装置の製造方法。
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