JPS6246989B2 - - Google Patents
Info
- Publication number
- JPS6246989B2 JPS6246989B2 JP55039288A JP3928880A JPS6246989B2 JP S6246989 B2 JPS6246989 B2 JP S6246989B2 JP 55039288 A JP55039288 A JP 55039288A JP 3928880 A JP3928880 A JP 3928880A JP S6246989 B2 JPS6246989 B2 JP S6246989B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon semiconductor
- semiconductor layer
- oxide film
- substrate
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H10P34/42—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
- H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
-
- H10P32/1414—
-
- H10P32/171—
-
- H10P95/90—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/046—Electron beam treatment of devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/09—Laser anneal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/091—Laser beam processing of fets
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Recrystallisation Techniques (AREA)
- High Energy & Nuclear Physics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3928880A JPS56135969A (en) | 1980-03-27 | 1980-03-27 | Manufacture of semiconductor device |
| US06/247,376 US4381202A (en) | 1980-03-27 | 1981-03-25 | Selective epitaxy by beam energy and devices thereon |
| EP81301326A EP0037261B1 (en) | 1980-03-27 | 1981-03-27 | A method of manufacturing a semiconductor device, and a device, for example a bomis fet, so manufactured |
| DE8181301326T DE3168239D1 (en) | 1980-03-27 | 1981-03-27 | A method of manufacturing a semiconductor device, and a device, for example a bomis fet, so manufactured |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3928880A JPS56135969A (en) | 1980-03-27 | 1980-03-27 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56135969A JPS56135969A (en) | 1981-10-23 |
| JPS6246989B2 true JPS6246989B2 (enExample) | 1987-10-06 |
Family
ID=12548963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3928880A Granted JPS56135969A (en) | 1980-03-27 | 1980-03-27 | Manufacture of semiconductor device |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4381202A (enExample) |
| EP (1) | EP0037261B1 (enExample) |
| JP (1) | JPS56135969A (enExample) |
| DE (1) | DE3168239D1 (enExample) |
Families Citing this family (40)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56160034A (en) * | 1980-05-14 | 1981-12-09 | Fujitsu Ltd | Impurity diffusion |
| JPS5878466A (ja) * | 1981-10-19 | 1983-05-12 | フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン | 低容量電界効果型トランジスタ |
| JPS5891621A (ja) * | 1981-11-26 | 1983-05-31 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPS58115832A (ja) * | 1981-12-28 | 1983-07-09 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPS59108313A (ja) * | 1982-12-13 | 1984-06-22 | Mitsubishi Electric Corp | 半導体単結晶層の製造方法 |
| US4837175A (en) * | 1983-02-15 | 1989-06-06 | Eaton Corporation | Making a buried channel FET with lateral growth over amorphous region |
| JPS59195871A (ja) * | 1983-04-20 | 1984-11-07 | Mitsubishi Electric Corp | Mos電界効果トランジスタの製造方法 |
| US4566914A (en) * | 1983-05-13 | 1986-01-28 | Micro Power Systems, Inc. | Method of forming localized epitaxy and devices formed therein |
| JPS59220972A (ja) * | 1983-05-30 | 1984-12-12 | Mitsubishi Electric Corp | Mos形半導体装置およびその製造方法 |
| JPS6077465A (ja) * | 1983-10-05 | 1985-05-02 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| KR890004495B1 (ko) * | 1984-11-29 | 1989-11-06 | 가부시끼가이샤 도오시바 | 반도체 장치 |
| US4651410A (en) * | 1984-12-18 | 1987-03-24 | Semiconductor Division Thomson-Csf Components Corporation | Method of fabricating regions of a bipolar microwave integratable transistor |
| US4654958A (en) * | 1985-02-11 | 1987-04-07 | Intel Corporation | Process for forming isolated silicon regions and field-effect devices on a silicon substrate |
| US4935789A (en) * | 1985-02-19 | 1990-06-19 | Eaton Corporation | Buried channel FET with lateral growth over amorphous region |
| JPS6235668A (ja) * | 1985-08-09 | 1987-02-16 | Nec Corp | 半導体記憶装置 |
| US4778775A (en) * | 1985-08-26 | 1988-10-18 | Intel Corporation | Buried interconnect for silicon on insulator structure |
| NL190388C (nl) * | 1986-02-07 | 1994-02-01 | Nippon Telegraph & Telephone | Werkwijze voor het vervaardigen van een halfgeleiderinrichting en halfgeleiderinrichting. |
| JPS6477156A (en) * | 1987-09-18 | 1989-03-23 | Toshiba Corp | Semiconductor device and manufacture thereof |
| EP0436038A4 (en) * | 1989-07-14 | 1991-09-04 | Seiko Instruments & Electronics Ltd. | Semiconductor device and method of producing the same |
| US5366922A (en) * | 1989-12-06 | 1994-11-22 | Seiko Instruments Inc. | Method for producing CMOS transistor |
| JP2660446B2 (ja) * | 1990-01-12 | 1997-10-08 | 三菱電機株式会社 | 微小なmis型fetとその製造方法 |
| JP2573715B2 (ja) * | 1990-03-28 | 1997-01-22 | 三菱電機株式会社 | エレベータ制御装置 |
| US5252143A (en) * | 1990-10-15 | 1993-10-12 | Hewlett-Packard Company | Bipolar transistor structure with reduced collector-to-substrate capacitance |
| EP0505877A2 (en) * | 1991-03-27 | 1992-09-30 | Seiko Instruments Inc. | Impurity doping method with adsorbed diffusion source |
| DE69213539T2 (de) * | 1991-04-26 | 1997-02-20 | Canon Kk | Halbleitervorrichtung mit verbessertem isoliertem Gate-Transistor |
| US6064077A (en) | 1991-08-30 | 2000-05-16 | Stmicroelectronics, Inc. | Integrated circuit transistor |
| GB9406900D0 (en) * | 1994-04-07 | 1994-06-01 | Philips Electronics Uk Ltd | Manufacture of electronic devices comprising thin -film transistors |
| JP3216861B2 (ja) * | 1995-04-10 | 2001-10-09 | シャープ株式会社 | 多結晶シリコン膜の形成方法および薄膜トランジスタの製造方法 |
| US5661051A (en) * | 1996-10-09 | 1997-08-26 | National Science Council | Method for fabricating a polysilicon transistor having a buried-gate structure |
| US6225666B1 (en) * | 1999-10-29 | 2001-05-01 | National Semiconductor Corporation | Low stress active area silicon island structure with a non-rectangular cross-section profile and method for its formation |
| JP3823693B2 (ja) * | 2000-06-22 | 2006-09-20 | 株式会社村田製作所 | 半導体薄膜の製造方法およびその製造方法による半導体薄膜を備えた磁電変換素子 |
| US6919238B2 (en) * | 2002-07-29 | 2005-07-19 | Intel Corporation | Silicon on insulator (SOI) transistor and methods of fabrication |
| US7749872B2 (en) * | 2004-03-17 | 2010-07-06 | The Board Of Trustees Of The Leland Stanford Junior University | Crystalline-type device and approach therefor |
| US7498243B2 (en) * | 2004-03-17 | 2009-03-03 | The Board Of Trustees Of The Leland Stanford Junior University | Crystalline-type device and approach therefor |
| KR100612123B1 (ko) * | 2004-10-18 | 2006-08-11 | 센서스앤드컨트롤스코리아 주식회사 | 냉장고 압축기용 접속 패키지 |
| KR100659977B1 (ko) * | 2004-11-03 | 2006-12-26 | 센서스앤드컨트롤스코리아 주식회사 | 냉장고 압축기용 접속 패키지의 분리형 클램프 장치 |
| KR20100040455A (ko) * | 2008-10-10 | 2010-04-20 | 주식회사 동부하이텍 | 반도체 소자의 제조 방법 |
| US10435814B2 (en) | 2015-10-30 | 2019-10-08 | The Board Of Trustees Of The Leland Stanford Junior University | Single metal crystals |
| DE102016117030B4 (de) | 2016-07-17 | 2018-07-05 | X-Fab Semiconductor Foundries Ag | Herstellung von Halbleiterstrukturen auf einem Trägersubstrat, die durch Überführungsdruck (Transfer Print) übertragbar sind. |
| DE102017101333B4 (de) | 2017-01-24 | 2023-07-27 | X-Fab Semiconductor Foundries Gmbh | Halbleiter und verfahren zur herstellung eines halbleiters |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4016587A (en) * | 1974-12-03 | 1977-04-05 | International Business Machines Corporation | Raised source and drain IGFET device and method |
| JPS51135385A (en) * | 1975-03-06 | 1976-11-24 | Texas Instruments Inc | Method of producing semiconductor device |
| US4240843A (en) * | 1978-05-23 | 1980-12-23 | Western Electric Company, Inc. | Forming self-guarded p-n junctions by epitaxial regrowth of amorphous regions using selective radiation annealing |
| US4187126A (en) * | 1978-07-28 | 1980-02-05 | Conoco, Inc. | Growth-orientation of crystals by raster scanning electron beam |
| US4147563A (en) * | 1978-08-09 | 1979-04-03 | The United States Of America As Represented By The United States Department Of Energy | Method for forming p-n junctions and solar-cells by laser-beam processing |
| DE2837750A1 (de) * | 1978-08-30 | 1980-03-13 | Philips Patentverwaltung | Verfahhren zum herstellen von halbleiterbauelementen |
| US4229232A (en) * | 1978-12-11 | 1980-10-21 | Spire Corporation | Method involving pulsed beam processing of metallic and dielectric materials |
| JPS55115341A (en) * | 1979-02-28 | 1980-09-05 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor device |
| US4269631A (en) * | 1980-01-14 | 1981-05-26 | International Business Machines Corporation | Selective epitaxy method using laser annealing for making filamentary transistors |
-
1980
- 1980-03-27 JP JP3928880A patent/JPS56135969A/ja active Granted
-
1981
- 1981-03-25 US US06/247,376 patent/US4381202A/en not_active Expired - Fee Related
- 1981-03-27 EP EP81301326A patent/EP0037261B1/en not_active Expired
- 1981-03-27 DE DE8181301326T patent/DE3168239D1/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| EP0037261A1 (en) | 1981-10-07 |
| DE3168239D1 (en) | 1985-02-28 |
| EP0037261B1 (en) | 1985-01-16 |
| JPS56135969A (en) | 1981-10-23 |
| US4381202A (en) | 1983-04-26 |
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