JPS5690525A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5690525A
JPS5690525A JP15400379A JP15400379A JPS5690525A JP S5690525 A JPS5690525 A JP S5690525A JP 15400379 A JP15400379 A JP 15400379A JP 15400379 A JP15400379 A JP 15400379A JP S5690525 A JPS5690525 A JP S5690525A
Authority
JP
Japan
Prior art keywords
film
window
etching
substrate
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15400379A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0135495B2 (enExample
Inventor
Kenji Sugishima
Chuichi Takada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=15574782&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPS5690525(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15400379A priority Critical patent/JPS5690525A/ja
Priority to US06208391 priority patent/US4352724B1/en
Priority to IE2457/80A priority patent/IE52972B1/en
Priority to DE8080304232T priority patent/DE3072013D1/de
Priority to EP80304232A priority patent/EP0030116B2/en
Priority to CA000365656A priority patent/CA1155973A/en
Publication of JPS5690525A publication Critical patent/JPS5690525A/ja
Publication of JPH0135495B2 publication Critical patent/JPH0135495B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W20/082—
    • H10P50/242—
    • H10P50/267—
    • H10P50/268—
    • H10P50/283—
    • H10P50/667—
    • H10P76/40—
    • H10P76/405—
    • H10P76/408—
    • H10P76/4083—
    • H10W20/031—

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
JP15400379A 1979-11-28 1979-11-28 Manufacture of semiconductor device Granted JPS5690525A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP15400379A JPS5690525A (en) 1979-11-28 1979-11-28 Manufacture of semiconductor device
US06208391 US4352724B1 (en) 1979-11-28 1980-11-19 Method of manufacturing a semiconductor device
IE2457/80A IE52972B1 (en) 1979-11-28 1980-11-26 Method of manufacturing a semiconductor device having a patterned multi-layer structure
DE8080304232T DE3072013D1 (en) 1979-11-28 1980-11-26 Method of manufacturing a semiconductor device having a patterned multi-layer structure
EP80304232A EP0030116B2 (en) 1979-11-28 1980-11-26 Method of manufacturing a semiconductor device having a patterned multi-layer structure
CA000365656A CA1155973A (en) 1979-11-28 1980-11-27 Method of etching

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15400379A JPS5690525A (en) 1979-11-28 1979-11-28 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5690525A true JPS5690525A (en) 1981-07-22
JPH0135495B2 JPH0135495B2 (enExample) 1989-07-25

Family

ID=15574782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15400379A Granted JPS5690525A (en) 1979-11-28 1979-11-28 Manufacture of semiconductor device

Country Status (6)

Country Link
US (1) US4352724B1 (enExample)
EP (1) EP0030116B2 (enExample)
JP (1) JPS5690525A (enExample)
CA (1) CA1155973A (enExample)
DE (1) DE3072013D1 (enExample)
IE (1) IE52972B1 (enExample)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56157025A (en) * 1980-05-07 1981-12-04 Nec Corp Manufacture of semiconductor device
JPS57124440A (en) * 1981-01-27 1982-08-03 Nec Corp Compound etching method
JPS57199223A (en) * 1981-06-01 1982-12-07 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS5817619A (ja) * 1981-07-23 1983-02-01 Toshiba Corp パタ−ン形成方法
JPS58143535A (ja) * 1982-02-22 1983-08-26 Hitachi Ltd 半導体装置の製造方法
JPS5923876A (ja) * 1982-07-28 1984-02-07 Hitachi Ltd エツチング方法
JPS5972138A (ja) * 1982-10-19 1984-04-24 Toshiba Corp 半導体装置の製造方法
JPS59169135A (ja) * 1983-03-16 1984-09-25 Fujitsu Ltd 半導体装置の製造方法
JPS59200420A (ja) * 1983-04-28 1984-11-13 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS6053030A (ja) * 1983-09-02 1985-03-26 Mitsubishi Electric Corp 半導体装置の製造方法
US5316616A (en) * 1988-02-09 1994-05-31 Fujitsu Limited Dry etching with hydrogen bromide or bromine
US8227323B2 (en) 2009-06-18 2012-07-24 Fuji Electric Co., Ltd. Method for manufacturing semiconductor device

Families Citing this family (68)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4380488A (en) * 1980-10-14 1983-04-19 Branson International Plasma Corporation Process and gas mixture for etching aluminum
US4472237A (en) * 1981-05-22 1984-09-18 At&T Bell Laboratories Reactive ion etching of tantalum and silicon
US4457820A (en) * 1981-12-24 1984-07-03 International Business Machines Corporation Two step plasma etching
JPS58125829A (ja) * 1982-01-22 1983-07-27 Hitachi Ltd ドライエツチング方法
US4450042A (en) * 1982-07-06 1984-05-22 Texas Instruments Incorporated Plasma etch chemistry for anisotropic etching of silicon
US4417947A (en) * 1982-07-16 1983-11-29 Signetics Corporation Edge profile control during patterning of silicon by dry etching with CCl4 -O2 mixtures
JPS5916978A (ja) * 1982-07-20 1984-01-28 Tokyo Denshi Kagaku Kabushiki 金属被膜の選択的エツチング方法
US4412885A (en) * 1982-11-03 1983-11-01 Applied Materials, Inc. Materials and methods for plasma etching of aluminum and aluminum alloys
US4414057A (en) * 1982-12-03 1983-11-08 Inmos Corporation Anisotropic silicide etching process
US4444618A (en) * 1983-03-03 1984-04-24 General Electric Company Processes and gas mixtures for the reactive ion etching of aluminum and aluminum alloys
US4505782A (en) * 1983-03-25 1985-03-19 Lfe Corporation Plasma reactive ion etching of aluminum and aluminum alloys
US4617193A (en) * 1983-06-16 1986-10-14 Digital Equipment Corporation Planar interconnect for integrated circuits
US4484978A (en) * 1983-09-23 1984-11-27 Fairchild Camera & Instrument Corp. Etching method
US4460435A (en) * 1983-12-19 1984-07-17 Rca Corporation Patterning of submicrometer metal silicide structures
US4456501A (en) * 1983-12-22 1984-06-26 Advanced Micro Devices, Inc. Process for dislocation-free slot isolations in device fabrication
JPS60223153A (ja) * 1984-04-19 1985-11-07 Nippon Telegr & Teleph Corp <Ntt> Ｍｉｓ型キャパシタを有する半導体装置の製法
US4624739A (en) * 1985-08-09 1986-11-25 International Business Machines Corporation Process using dry etchant to avoid mask-and-etch cycle
US4734157A (en) * 1985-08-27 1988-03-29 International Business Machines Corporation Selective and anisotropic dry etching
EP0282820A1 (de) * 1987-03-13 1988-09-21 Siemens Aktiengesellschaft Verfahren zum Erzeugen von Kontaktlöchern mit abgeschrägten Flanken in Zwischenoxidschichten
JPS63258021A (ja) * 1987-04-16 1988-10-25 Toshiba Corp 接続孔の形成方法
US4778583A (en) * 1987-05-11 1988-10-18 Eastman Kodak Company Semiconductor etching process which produces oriented sloped walls
JPS6432633A (en) * 1987-07-29 1989-02-02 Hitachi Ltd Taper etching method
US4832787A (en) * 1988-02-19 1989-05-23 International Business Machines Corporation Gas mixture and method for anisotropic selective etch of nitride
GB2220298A (en) * 1988-06-29 1990-01-04 Philips Nv A method of manufacturing a semiconductor device
US4902377A (en) * 1989-05-23 1990-02-20 Motorola, Inc. Sloped contact etch process
EP0410635A1 (en) * 1989-07-28 1991-01-30 AT&T Corp. Window taper-etching method in the manufacture of integrated circuit semiconductor devices
JP2673380B2 (ja) * 1990-02-20 1997-11-05 三菱電機株式会社 プラズマエッチングの方法
JPH04225525A (ja) * 1990-12-27 1992-08-14 Sony Corp ドライエッチング方法
JPH05152293A (ja) * 1991-04-30 1993-06-18 Sgs Thomson Microelectron Inc 段差付き壁相互接続体及びゲートの製造方法
EP0541160A1 (en) * 1991-11-07 1993-05-12 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device whereby contact windows are provided in an insulating layer comprising silicon nitride in two etching steps
US5759869A (en) * 1991-12-31 1998-06-02 Sgs-Thomson Microelectronics, Inc. Method to imporve metal step coverage by contact reflow
US5880036A (en) * 1992-06-15 1999-03-09 Micron Technology, Inc. Method for enhancing oxide to nitride selectivity through the use of independent heat control
US5505816A (en) * 1993-12-16 1996-04-09 International Business Machines Corporation Etching of silicon dioxide selectively to silicon nitride and polysilicon
EP0660392A1 (en) 1993-12-17 1995-06-28 STMicroelectronics, Inc. Method and interlevel dielectric structure for improved metal step coverage
US5780343A (en) * 1995-12-20 1998-07-14 National Semiconductor Corporation Method of producing high quality silicon surface for selective epitaxial growth of silicon
US5928967A (en) * 1996-06-10 1999-07-27 International Business Machines Corporation Selective oxide-to-nitride etch process using C4 F8 /CO/Ar
US6036875A (en) * 1997-02-20 2000-03-14 Advanced Micro Devices, Inc. Method for manufacturing a semiconductor device with ultra-fine line geometry
US6121133A (en) 1997-08-22 2000-09-19 Micron Technology, Inc. Isolation using an antireflective coating
US5834346A (en) * 1997-10-14 1998-11-10 Taiwan Semiconductor Manufacturing Company, Ltd. Procedure for eliminating bubbles formed during reflow of a dielectric layer over an LDD structure
US5939335A (en) * 1998-01-06 1999-08-17 International Business Machines Corporation Method for reducing stress in the metallization of an integrated circuit
JP3252780B2 (ja) * 1998-01-16 2002-02-04 日本電気株式会社 シリコン層のエッチング方法
US6077789A (en) * 1998-07-14 2000-06-20 United Microelectronics Corp. Method for forming a passivation layer with planarization
US6294459B1 (en) 1998-09-03 2001-09-25 Micron Technology, Inc. Anti-reflective coatings and methods for forming and using same
KR100292616B1 (ko) * 1998-10-09 2001-07-12 윤종용 트렌치격리의제조방법
JP3287322B2 (ja) * 1998-12-28 2002-06-04 日本電気株式会社 半導体装置の製造方法
DE19910886B4 (de) * 1999-03-11 2008-08-14 Infineon Technologies Ag Verfahren zur Herstellung einer flachen Grabenisolation für elektrisch aktive Bauelemente
US6271141B2 (en) 1999-03-23 2001-08-07 Micron Technology, Inc. Methods of forming materials over uneven surface topologies, and methods of forming insulative materials over and between conductive lines
US6444588B1 (en) 1999-04-26 2002-09-03 Micron Technology, Inc. Anti-reflective coatings and methods regarding same
US7411211B1 (en) * 1999-07-22 2008-08-12 Semiconductor Energy Laboratory Co., Ltd. Contact structure and semiconductor device
US6372151B1 (en) 1999-07-27 2002-04-16 Applied Materials, Inc. Storage poly process without carbon contamination
KR100338767B1 (ko) 1999-10-12 2002-05-30 윤종용 트렌치 소자분리 구조와 이를 갖는 반도체 소자 및 트렌치 소자분리 방법
KR100335495B1 (ko) * 1999-11-12 2002-05-08 윤종용 디봇 발생을 방지하며 공정이 간단한 소자분리막의 제조방법
US6372605B1 (en) * 2000-06-26 2002-04-16 Agere Systems Guardian Corp. Additional etching to decrease polishing time for shallow-trench isolation in semiconductor processing
US6897120B2 (en) * 2001-01-03 2005-05-24 Micron Technology, Inc. Method of forming integrated circuitry and method of forming shallow trench isolation in a semiconductor substrate
US6399461B1 (en) * 2001-01-16 2002-06-04 Promos Technologies, Inc. Addition of planarizing dielectric layer to reduce a dishing phenomena experienced during a chemical mechanical procedure used in the formation of shallow trench isolation regions
US6699770B2 (en) * 2001-03-01 2004-03-02 John Tarje Torvik Method of making a hybride substrate having a thin silicon carbide membrane layer
JP3983019B2 (ja) * 2001-08-24 2007-09-26 シャープ株式会社 埋め込み構造を有する基板の製造方法および表示装置の製造方法
DE10142595C2 (de) * 2001-08-31 2003-10-09 Infineon Technologies Ag Verfahren zum Ausgleichen von unterschiedlichen Stufenhöhen und zum Herstellen von planaren Oxidschichten in einer integrierten Halbleiterschaltungsanordung
US6630402B2 (en) 2001-11-21 2003-10-07 General Semiconductor, Inc. Integrated circuit resistant to the formation of cracks in a passivation layer
US6518164B1 (en) * 2001-11-30 2003-02-11 United Microelectronics Corp. Etching process for forming the trench with high aspect ratio
US6828213B2 (en) * 2002-03-21 2004-12-07 Texas Instruments Incorporated Method to improve STI nano gap fill and moat nitride pull back
US6774037B2 (en) * 2002-05-17 2004-08-10 Intel Corporation Method integrating polymeric interlayer dielectric in integrated circuits
JP3986927B2 (ja) * 2002-08-22 2007-10-03 富士通株式会社 半導体装置の製造方法
KR100506192B1 (ko) * 2003-05-12 2005-08-03 매그나칩 반도체 유한회사 반도체 소자의 고저항 영역 형성 방법
US7078282B2 (en) * 2003-12-30 2006-07-18 Intel Corporation Replacement gate flow facilitating high yield and incorporation of etch stop layers and/or stressed films
US7468324B2 (en) * 2004-12-08 2008-12-23 The University Court Of The University Of Edinburgh Microelectromechanical devices and their fabrication
US7951683B1 (en) * 2007-04-06 2011-05-31 Novellus Systems, Inc In-situ process layer using silicon-rich-oxide for etch selectivity in high AR gapfill
US12308212B2 (en) * 2022-09-30 2025-05-20 Tokyo Electron Limited In-situ adsorbate formation for plasma etch process

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5240978A (en) * 1975-09-27 1977-03-30 Fujitsu Ltd Process for production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5240978A (en) * 1975-09-27 1977-03-30 Fujitsu Ltd Process for production of semiconductor device

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56157025A (en) * 1980-05-07 1981-12-04 Nec Corp Manufacture of semiconductor device
JPS57124440A (en) * 1981-01-27 1982-08-03 Nec Corp Compound etching method
JPS57199223A (en) * 1981-06-01 1982-12-07 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS5817619A (ja) * 1981-07-23 1983-02-01 Toshiba Corp パタ−ン形成方法
JPS58143535A (ja) * 1982-02-22 1983-08-26 Hitachi Ltd 半導体装置の製造方法
JPS5923876A (ja) * 1982-07-28 1984-02-07 Hitachi Ltd エツチング方法
JPS5972138A (ja) * 1982-10-19 1984-04-24 Toshiba Corp 半導体装置の製造方法
JPS59169135A (ja) * 1983-03-16 1984-09-25 Fujitsu Ltd 半導体装置の製造方法
JPS59200420A (ja) * 1983-04-28 1984-11-13 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS6053030A (ja) * 1983-09-02 1985-03-26 Mitsubishi Electric Corp 半導体装置の製造方法
US5316616A (en) * 1988-02-09 1994-05-31 Fujitsu Limited Dry etching with hydrogen bromide or bromine
US8227323B2 (en) 2009-06-18 2012-07-24 Fuji Electric Co., Ltd. Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
EP0030116B1 (en) 1987-08-19
CA1155973A (en) 1983-10-25
IE52972B1 (en) 1988-04-27
EP0030116A2 (en) 1981-06-10
EP0030116A3 (en) 1985-05-15
JPH0135495B2 (enExample) 1989-07-25
IE802457L (en) 1981-05-28
US4352724A (en) 1982-10-05
DE3072013D1 (en) 1987-09-24
US4352724B1 (en) 1997-06-10
EP0030116B2 (en) 1992-04-22

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