JPS57199223A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57199223A
JPS57199223A JP8469481A JP8469481A JPS57199223A JP S57199223 A JPS57199223 A JP S57199223A JP 8469481 A JP8469481 A JP 8469481A JP 8469481 A JP8469481 A JP 8469481A JP S57199223 A JPS57199223 A JP S57199223A
Authority
JP
Japan
Prior art keywords
pattern
film
etching
photoresist pattern
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8469481A
Other languages
Japanese (ja)
Inventor
Hiroshi Kuroda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8469481A priority Critical patent/JPS57199223A/en
Publication of JPS57199223A publication Critical patent/JPS57199223A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Abstract

PURPOSE:To avoid discontinuity of an upper electride and improve the yield and reliability by providing inclinations to upper edges of a lower pattern which crosses with the upper electrode. CONSTITUTION:A photoresist pattern 13 is formed on a film 12 adhered on an Si substrate 11 and the film 12 is etched off to about a half of its thickness by isotropic etching using the photoresist pattern 13 as a mask. At this time, the etching profile is are shape and eaveses 14 which have the length nearly equal to the etching depth are formed to the photoresist pattern 13. Then, if the remained film 12 is etched off by anisotropic etching, the pattern width A of the formed film pattern 12' is nearly the same as the width B of the resist pattern 13.
JP8469481A 1981-06-01 1981-06-01 Manufacture of semiconductor device Pending JPS57199223A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8469481A JPS57199223A (en) 1981-06-01 1981-06-01 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8469481A JPS57199223A (en) 1981-06-01 1981-06-01 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57199223A true JPS57199223A (en) 1982-12-07

Family

ID=13837770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8469481A Pending JPS57199223A (en) 1981-06-01 1981-06-01 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57199223A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58143535A (en) * 1982-02-22 1983-08-26 Hitachi Ltd Manufacture of semiconductor device
JPS59175124A (en) * 1983-03-24 1984-10-03 Toshiba Corp Manufacture of semiconductor device
US4715930A (en) * 1985-11-15 1987-12-29 Commissariat A L'energie Atomique Process for producing by sloping etching a thin film transistor with a self-aligned gate with respect to the drain and source thereof
US4800170A (en) * 1987-10-02 1989-01-24 General Motors Corporation Process for forming in a silicon oxide layer a portion with vertical side walls
JPH02152277A (en) * 1988-12-02 1990-06-12 Nec Corp Formation of silicon gate electrode
DE4212494A1 (en) * 1991-04-17 1992-10-22 Mitsubishi Electric Corp Producing isolated semiconductor sidewall for MOS transistor - using selective isotropic and anisotropic plasma etching of polycrystalline silicon@ and silicon@ isolating layers

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5240978A (en) * 1975-09-27 1977-03-30 Fujitsu Ltd Process for production of semiconductor device
JPS5487172A (en) * 1977-12-23 1979-07-11 Hitachi Ltd Manufacture for simiconductor device
JPS5687666A (en) * 1979-12-20 1981-07-16 Toshiba Corp Plasma etching method
JPS5690525A (en) * 1979-11-28 1981-07-22 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5240978A (en) * 1975-09-27 1977-03-30 Fujitsu Ltd Process for production of semiconductor device
JPS5487172A (en) * 1977-12-23 1979-07-11 Hitachi Ltd Manufacture for simiconductor device
JPS5690525A (en) * 1979-11-28 1981-07-22 Fujitsu Ltd Manufacture of semiconductor device
JPS5687666A (en) * 1979-12-20 1981-07-16 Toshiba Corp Plasma etching method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58143535A (en) * 1982-02-22 1983-08-26 Hitachi Ltd Manufacture of semiconductor device
JPS59175124A (en) * 1983-03-24 1984-10-03 Toshiba Corp Manufacture of semiconductor device
US4715930A (en) * 1985-11-15 1987-12-29 Commissariat A L'energie Atomique Process for producing by sloping etching a thin film transistor with a self-aligned gate with respect to the drain and source thereof
US4800170A (en) * 1987-10-02 1989-01-24 General Motors Corporation Process for forming in a silicon oxide layer a portion with vertical side walls
JPH02152277A (en) * 1988-12-02 1990-06-12 Nec Corp Formation of silicon gate electrode
DE4212494A1 (en) * 1991-04-17 1992-10-22 Mitsubishi Electric Corp Producing isolated semiconductor sidewall for MOS transistor - using selective isotropic and anisotropic plasma etching of polycrystalline silicon@ and silicon@ isolating layers
US5432367A (en) * 1991-04-17 1995-07-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having sidewall insulating film
US5541127A (en) * 1991-04-17 1996-07-30 Mitsubishi Denki Kabushiki Kaisha Manufacturing method of sidewall insulating film

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