JPS57101668A - Etching method - Google Patents

Etching method

Info

Publication number
JPS57101668A
JPS57101668A JP17946680A JP17946680A JPS57101668A JP S57101668 A JPS57101668 A JP S57101668A JP 17946680 A JP17946680 A JP 17946680A JP 17946680 A JP17946680 A JP 17946680A JP S57101668 A JPS57101668 A JP S57101668A
Authority
JP
Japan
Prior art keywords
film
sio
etched
thickness
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17946680A
Other languages
Japanese (ja)
Inventor
Hideaki Shimoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17946680A priority Critical patent/JPS57101668A/en
Publication of JPS57101668A publication Critical patent/JPS57101668A/en
Pending legal-status Critical Current

Links

Landscapes

  • ing And Chemical Polishing (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To prevent an overhung phenomenon in formation of a SiO2 film or the like and to prevent breakage of an upper electrode by forming an Al film on a wafer so as to form a side surface thereof into a stepped form by etching.
CONSTITUTION: An Al film 12 is formed on a wafer 11 as a lower electrode and a photoresist pattern 13 is formed thereon. Subsequently, by a dry etching method, the Al film 12 is etched so as to reduce a thickness thereof to about half thickness of a vapor deposition film thickness and the photoresist 13 is flowed by heating to mask an etched side surface 14. Next, the Al film 12 is etched to form a first Al wiring pattern 15 in a stepped form. Further, a SiO2 film 16 is formed and a predetermined part of the SiO2 film 16 is removed by hot etching and, thereafter, an Al film as an upper electrode is formed by vapor deposition to form a second Al wiring pattern 17.
COPYRIGHT: (C)1982,JPO&Japio
JP17946680A 1980-12-17 1980-12-17 Etching method Pending JPS57101668A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17946680A JPS57101668A (en) 1980-12-17 1980-12-17 Etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17946680A JPS57101668A (en) 1980-12-17 1980-12-17 Etching method

Publications (1)

Publication Number Publication Date
JPS57101668A true JPS57101668A (en) 1982-06-24

Family

ID=16066338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17946680A Pending JPS57101668A (en) 1980-12-17 1980-12-17 Etching method

Country Status (1)

Country Link
JP (1) JPS57101668A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436049A (en) * 1987-07-31 1989-02-07 Toshiba Corp Semiconductor integrated circuit and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436049A (en) * 1987-07-31 1989-02-07 Toshiba Corp Semiconductor integrated circuit and manufacture thereof

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