JPS54102983A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54102983A
JPS54102983A JP1010678A JP1010678A JPS54102983A JP S54102983 A JPS54102983 A JP S54102983A JP 1010678 A JP1010678 A JP 1010678A JP 1010678 A JP1010678 A JP 1010678A JP S54102983 A JPS54102983 A JP S54102983A
Authority
JP
Japan
Prior art keywords
film
pattern
opening
softened
disconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1010678A
Other languages
Japanese (ja)
Inventor
Juro Yasui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1010678A priority Critical patent/JPS54102983A/en
Publication of JPS54102983A publication Critical patent/JPS54102983A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To obtain the opening featuring a gentle slope of its side wall for the insulator film and thus to avoid the disconnection of the electrode wiring by forming the PSG film on the conducting film pattern and then removing it selectively and then coating the insulator film of a low etching speed on the pattern to be then etched away in the same way.
CONSTITUTION: SiO2 film 2 is coated on Si substrate 1, and then conducting film pattern 3 and 4 composed of polycrystal Si or the metal. The entire surface is heated up to be covered with the softened and flowing PSG film 5. Then film 5 is removed on pattern 3 and 4 through the photo etching method, and no trouble is caused in this case even if gap 6 is produced. After this, oxide film 7 and 8 are formed on the upper and side surfaces of pattern 3 and 4 through the heat treatment, and at the same time film 5 is softened to fill up gap 6. Then opening 10 is formed by etching to part of film 7, and thus side wall 11 of opening 10 is tilted gently. Accordingly, no disconnection is caused to the Al wiring which is provided on wall 11.
COPYRIGHT: (C)1979,JPO&Japio
JP1010678A 1978-01-31 1978-01-31 Manufacture of semiconductor device Pending JPS54102983A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1010678A JPS54102983A (en) 1978-01-31 1978-01-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1010678A JPS54102983A (en) 1978-01-31 1978-01-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS54102983A true JPS54102983A (en) 1979-08-13

Family

ID=11741053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1010678A Pending JPS54102983A (en) 1978-01-31 1978-01-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54102983A (en)

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