JPS5539674A - Method of forming electrode wiring of semiconductor device - Google Patents

Method of forming electrode wiring of semiconductor device

Info

Publication number
JPS5539674A
JPS5539674A JP11330978A JP11330978A JPS5539674A JP S5539674 A JPS5539674 A JP S5539674A JP 11330978 A JP11330978 A JP 11330978A JP 11330978 A JP11330978 A JP 11330978A JP S5539674 A JPS5539674 A JP S5539674A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
film
electrode
pattern
base
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11330978A
Inventor
Akira Tabata
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE: To eliminate a pattern gap and to evade the current amplification rate lowering by shaping a territory exposed at the electrode edge applying anisotropy etching liquid, when fixing a metal electrode on the base and the emitter territory formed on the semiconductor base.
CONSTITUTION: To form the base diffusion territory 5 on the semiconductor base, and to provide therein an emitter diffusion layer 4 followed by fixing a SiO2 film 3 over the whole surface. Next, to make a window through the film 3 in the position on the territories 5 and 4, further to grow polycrystal Si layer 12 on the whole surface and to fix thereon an Al film 11, wihch is to become an electrode wiring layer. Subsequently, to provide the prescribed pattern of photoresistance film 10 from one upper part of the territories 5 and 4 onto the film 11 and to remove the exposed film 11 by etching to form the electrode pattern 1. Next, only the surface area of the pattern 1 will be changed into an Al2O3 film 11 and under the mask thereof, the layer 12 will be removed applying anisotropy etching liquid, simultaneously the territories 5 and 4 exposed at the edge of the film 11 will be given a hollow and formed.
COPYRIGHT: (C)1980,JPO&Japio
JP11330978A 1978-09-14 1978-09-14 Method of forming electrode wiring of semiconductor device Pending JPS5539674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11330978A JPS5539674A (en) 1978-09-14 1978-09-14 Method of forming electrode wiring of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11330978A JPS5539674A (en) 1978-09-14 1978-09-14 Method of forming electrode wiring of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5539674A true true JPS5539674A (en) 1980-03-19

Family

ID=14608962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11330978A Pending JPS5539674A (en) 1978-09-14 1978-09-14 Method of forming electrode wiring of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5539674A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5162259A (en) * 1991-02-04 1992-11-10 Motorola, Inc. Method for forming a buried contact in a semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5162259A (en) * 1991-02-04 1992-11-10 Motorola, Inc. Method for forming a buried contact in a semiconductor device

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