JPS5512705A - Processing method of electrode wiring - Google Patents

Processing method of electrode wiring

Info

Publication number
JPS5512705A
JPS5512705A JP8403478A JP8403478A JPS5512705A JP S5512705 A JPS5512705 A JP S5512705A JP 8403478 A JP8403478 A JP 8403478A JP 8403478 A JP8403478 A JP 8403478A JP S5512705 A JPS5512705 A JP S5512705A
Authority
JP
Japan
Prior art keywords
film
insulation film
electrode wiring
psg
piq
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8403478A
Other languages
Japanese (ja)
Inventor
Yoshinori Kureishi
Mitsuaki Horiuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP8403478A priority Critical patent/JPS5512705A/en
Publication of JPS5512705A publication Critical patent/JPS5512705A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To eliminate steps which are made during multilayer wiring process, thus preventing breaks by preforming an insulation film, that is as thick as an electrode wiring, at an area which surrounds a side face of an end terminal of the electrode wiring, and by forming the electrode wiring next to and in contact with a side face of this insulation film.
CONSTITUTION: (a); the first opeining 13 is made in the first SiO2 insulation film 12 on a Si substrate 11. (b); a PSG film 14 whose etching speed is faster than Si, is formed on the first insulation film as the second insulation film that is as thick as an electrode wiring. (c); a PIQ film 15 which has the second opeining 17 is formed on the second insulation film. (d); the PIQ film and PSG film are selectively removed. (e); then the entire surface is coated by Al vapour, and (f); heat applied to the PIQ melts it thus leaving the Al layer 18b only in an area surrounded by the PSG film. (g); an insulation film 19 made of SiO2 or PSG is laid on the entire surface to be used as a film in between layers. (h); holes are made for exposing parts of the Al layer, and the process is repeated from (b) thus forming a wiring 20 on the top.
COPYRIGHT: (C)1980,JPO&Japio
JP8403478A 1978-07-12 1978-07-12 Processing method of electrode wiring Pending JPS5512705A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8403478A JPS5512705A (en) 1978-07-12 1978-07-12 Processing method of electrode wiring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8403478A JPS5512705A (en) 1978-07-12 1978-07-12 Processing method of electrode wiring

Publications (1)

Publication Number Publication Date
JPS5512705A true JPS5512705A (en) 1980-01-29

Family

ID=13819237

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8403478A Pending JPS5512705A (en) 1978-07-12 1978-07-12 Processing method of electrode wiring

Country Status (1)

Country Link
JP (1) JPS5512705A (en)

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