JPS56165339A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS56165339A JPS56165339A JP6928280A JP6928280A JPS56165339A JP S56165339 A JPS56165339 A JP S56165339A JP 6928280 A JP6928280 A JP 6928280A JP 6928280 A JP6928280 A JP 6928280A JP S56165339 A JPS56165339 A JP S56165339A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- silicon oxide
- wiring
- coated
- layer wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To decrease difference in steps by a lower layer wiring layer and obtain a semiconductor device having high performance and high reliability, which is provided with minute multilayer wiring, by coating an etched section of lower wiring with an electric insulating film and burying the etched section. CONSTITUTION:A silicon substrate 21 to which the desired P-N junction is formed is coated with a silicon oxide film 22, an opening for forming an electrode is made up and lower layer wiring 24 in aluminum is coated. Etched sections 26 reaching the silicon oxide film 22 are built up using a photoresist 25 as a mask. The photoresist 25 is removed, a silicon oxide film 27 is coated in thickness more than the half of the etching width of the lower layer wiring 24, the etched sections 26 are buried and the surface is planed. An opening 28 is formed to the silicon oxide film 27, and upper layer wiring 29 is made up according to the coating of aluminum and a selective etching method. Thus, the unevenness of the surface is reduced extremely, and minute multilayer wiring is built up.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6928280A JPS56165339A (en) | 1980-05-23 | 1980-05-23 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6928280A JPS56165339A (en) | 1980-05-23 | 1980-05-23 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56165339A true JPS56165339A (en) | 1981-12-18 |
JPS6239823B2 JPS6239823B2 (en) | 1987-08-25 |
Family
ID=13398111
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6928280A Granted JPS56165339A (en) | 1980-05-23 | 1980-05-23 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56165339A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60175440A (en) * | 1984-02-20 | 1985-09-09 | Matsushita Electronics Corp | Manufacture of semiconductor device |
US5266835A (en) * | 1988-02-02 | 1993-11-30 | National Semiconductor Corporation | Semiconductor structure having a barrier layer disposed within openings of a dielectric layer |
-
1980
- 1980-05-23 JP JP6928280A patent/JPS56165339A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60175440A (en) * | 1984-02-20 | 1985-09-09 | Matsushita Electronics Corp | Manufacture of semiconductor device |
US5266835A (en) * | 1988-02-02 | 1993-11-30 | National Semiconductor Corporation | Semiconductor structure having a barrier layer disposed within openings of a dielectric layer |
Also Published As
Publication number | Publication date |
---|---|
JPS6239823B2 (en) | 1987-08-25 |
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