JPS5789242A - Fabrication of semiconductor device - Google Patents
Fabrication of semiconductor deviceInfo
- Publication number
- JPS5789242A JPS5789242A JP16563480A JP16563480A JPS5789242A JP S5789242 A JPS5789242 A JP S5789242A JP 16563480 A JP16563480 A JP 16563480A JP 16563480 A JP16563480 A JP 16563480A JP S5789242 A JPS5789242 A JP S5789242A
- Authority
- JP
- Japan
- Prior art keywords
- insulation layer
- layer
- interconnection
- deposited
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To form reliable multilayer interconnections by a procedure in which interconnection for a first insulation layer is formed by building an aluminum alloy layer on which other conductive layers are deposited. Next, pretreatment after forming a contact hole is made using diluted hydrofluoric acid. CONSTITUTION:The first insulation layer 13 of SiO2 is formed on a substrate of silicon 11 on which a diffused region 12 is deposited. On this first insulation layer, an Al-Si alloy layer 14 and an aluminum layer 15 are produced. Next, after making wet etching using phosphoric acid as principal constituent to form interconnection for the first insulation layer, a second insulation layer of SiO2 16 is deposited over the entire surface. The area except a contact hole for the first insulation layer interconnection and the substrate are covered with resist coating and contact holes 17 are formed by etching. After this, an Al-Si alloy layer is deposited for interconnection for the second insulation layer 18. This procedure allows conductive surfaces to be exposed on the contact holes for the second insulation layer to both the first insulation layer and the substrate by successful reproducibility.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16563480A JPS5789242A (en) | 1980-11-25 | 1980-11-25 | Fabrication of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16563480A JPS5789242A (en) | 1980-11-25 | 1980-11-25 | Fabrication of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5789242A true JPS5789242A (en) | 1982-06-03 |
Family
ID=15816083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16563480A Pending JPS5789242A (en) | 1980-11-25 | 1980-11-25 | Fabrication of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5789242A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0103855A2 (en) * | 1982-09-20 | 1984-03-28 | International Business Machines Corporation | Process for integrated circuit metallization with low via resistance |
JPS59208857A (en) * | 1983-05-13 | 1984-11-27 | Seiko Epson Corp | Semiconductor device |
JPH01212451A (en) * | 1988-02-20 | 1989-08-25 | Sony Corp | Manufacture of semiconductor device |
-
1980
- 1980-11-25 JP JP16563480A patent/JPS5789242A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0103855A2 (en) * | 1982-09-20 | 1984-03-28 | International Business Machines Corporation | Process for integrated circuit metallization with low via resistance |
JPS59208857A (en) * | 1983-05-13 | 1984-11-27 | Seiko Epson Corp | Semiconductor device |
JPH01212451A (en) * | 1988-02-20 | 1989-08-25 | Sony Corp | Manufacture of semiconductor device |
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