JPS5731155A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5731155A
JPS5731155A JP10591980A JP10591980A JPS5731155A JP S5731155 A JPS5731155 A JP S5731155A JP 10591980 A JP10591980 A JP 10591980A JP 10591980 A JP10591980 A JP 10591980A JP S5731155 A JPS5731155 A JP S5731155A
Authority
JP
Japan
Prior art keywords
patterns
wiring
thickness
film
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10591980A
Other languages
Japanese (ja)
Inventor
Masao Kanazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10591980A priority Critical patent/JPS5731155A/en
Publication of JPS5731155A publication Critical patent/JPS5731155A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To improve formation accuracy of the upper layer wiring, by a method wherein an independent pattern having the same quality and thickness as those of the lower layer wiring patterns is formed on the lower insulating film between the lower layer wiring patterns, and a flat surface is obtained by stacking an interlayer insulating film. CONSTITUTION:Al wirings 15 connected to diffusion layers 11, 11' are formed by opening SiO2 on an Si substrate 14. At that time, an indepedent Al pattern 17 is provided between patterns 16 at the region where the interval (b) between the patterns 16 of the lower layer wiring 15 having twice or more the thickness T' of a layer PSG insulating film provided at the upper layer and the intervals (d') between the patterns 16 are made to have the width tiwce or less the thickness T of the layer PSG film provided at the upper layer. Next, with the layer PSG18 made, the concave sections between the patterns are completely buried, and a flat film 18 having desired thickness is also formed on the Al wirings 16, 17. An opening window 19 is selectively formed to make an Al wiring 20. The film 18 surface is flat, therefore the film thickness of the wiring 20 is equal, and the wiring can be formed with high accuracy.
JP10591980A 1980-07-31 1980-07-31 Manufacture of semiconductor device Pending JPS5731155A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10591980A JPS5731155A (en) 1980-07-31 1980-07-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10591980A JPS5731155A (en) 1980-07-31 1980-07-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5731155A true JPS5731155A (en) 1982-02-19

Family

ID=14420265

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10591980A Pending JPS5731155A (en) 1980-07-31 1980-07-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5731155A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57105685U (en) * 1980-12-22 1982-06-29
JPS5968951A (en) * 1982-10-12 1984-04-19 Matsushita Electric Ind Co Ltd Semiconductor device and manufacture thereof
JPS5986247A (en) * 1982-11-08 1984-05-18 Matsushita Electronics Corp Manufacture of semiconductor device
JPS59114838A (en) * 1982-12-22 1984-07-03 Fujitsu Ltd Manufacture of semiconductor device
JPS59169151A (en) * 1983-03-17 1984-09-25 Toshiba Corp Manufacture of semiconductor device
JPS6364340A (en) * 1986-09-05 1988-03-22 Hitachi Ltd Interconnection structure effective for improving flatness of organic interlayer film
JPS63172444A (en) * 1987-01-10 1988-07-16 Toshiba Corp Manufacture of semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57105685U (en) * 1980-12-22 1982-06-29
JPS6226791Y2 (en) * 1980-12-22 1987-07-09
JPS5968951A (en) * 1982-10-12 1984-04-19 Matsushita Electric Ind Co Ltd Semiconductor device and manufacture thereof
JPS5986247A (en) * 1982-11-08 1984-05-18 Matsushita Electronics Corp Manufacture of semiconductor device
JPS59114838A (en) * 1982-12-22 1984-07-03 Fujitsu Ltd Manufacture of semiconductor device
JPS59169151A (en) * 1983-03-17 1984-09-25 Toshiba Corp Manufacture of semiconductor device
JPH0563940B2 (en) * 1983-03-17 1993-09-13 Tokyo Shibaura Electric Co
JPS6364340A (en) * 1986-09-05 1988-03-22 Hitachi Ltd Interconnection structure effective for improving flatness of organic interlayer film
JPS63172444A (en) * 1987-01-10 1988-07-16 Toshiba Corp Manufacture of semiconductor device

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