JP6005356B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6005356B2 JP6005356B2 JP2011282898A JP2011282898A JP6005356B2 JP 6005356 B2 JP6005356 B2 JP 6005356B2 JP 2011282898 A JP2011282898 A JP 2011282898A JP 2011282898 A JP2011282898 A JP 2011282898A JP 6005356 B2 JP6005356 B2 JP 6005356B2
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- C04B35/58—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on non-oxide ceramics based on borides, nitrides, i.e. nitrides, oxynitrides, carbonitrides or oxycarbonitrides or silicides
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- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
- H01L27/1207—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
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- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
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- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
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Description
本発明の一態様に係る半導体装置の構成及びその作製方法について、図1乃至図5を参照して説明する。
図1は、半導体装置の構成の一例である。図1(A)には半導体装置の断面を、図1(B)には半導体装置の回路図を、それぞれ示す。図1に示す半導体装置は、記憶装置として用いることができる。なお、図1に示す半導体装置は、所定の機能を有する半導体装置の一例であって、本発明の一態様の半導体装置をもれなく表現したものではない。本発明の一態様に係る半導体装置は、電極の接続関係等を適宜変更して、その他の機能を有するものとすることが可能である。
次に、上記半導体装置の作製方法の一例について図2乃至図5を用いて説明する。まず、下部のトランジスタ160及びトランジスタ161の作製方法について、図2及び図3を参照して説明した後、上部のトランジスタ162及びトランジスタ163の作製方法について図4及び図5を参照して説明する。
まず、半導体材料を含む基板100を用意する(図2(A)参照)。半導体材料を含む基板100としては、シリコンや炭化シリコンなどの単結晶半導体基板、多結晶半導体基板、シリコンゲルマニウムなどの化合物半導体基板、SOI基板などを適用することができる。ここでは、半導体材料を含む基板100として、単結晶シリコン基板を用いる場合の一例について示すものとする。なお、一般に「SOI基板」は、絶縁表面上にシリコン半導体層が設けられた構成の基板をいうが、本明細書等においては、絶縁表面上にシリコン以外の材料からなる半導体層が設けられた構成の基板も含む概念として用いる。つまり、「SOI基板」が有する半導体層は、シリコン半導体層に限定されない。また、SOI基板には、ガラス基板などの絶縁基板上に絶縁層を介して半導体層が設けられた構成のものが含まれるものとする。
絶縁層130の表面を可能な限り平坦化し、ゲート電極110a、110bの上面を露出させた後、酸化物半導体層142を成膜する(図4(A)参照)。
本実施の形態では、先の実施の形態に示す半導体装置とは、一部異なる半導体装置について、図6及び図7を参照して説明する。なお、本実施の形態では、先の実施の形態と異なる部分についてのみ説明する。
図6(A)に半導体装置の断面を、図6(B)に半導体装置の回路図をそれぞれ示す。図6に示す半導体装置も、記憶装置として用いることができる。
次に、図6に示す半導体装置の作製方法について、図7を参照して説明する。絶縁層130を形成する工程までは、実施の形態1と同様であるため、詳細な説明は省略する。
本実施の形態では、先の実施の形態に示す半導体装置とは、一部異なる半導体装置について、図8及び図9を参照して説明する。なお、本実施の形態では、先の実施の形態と異なる部分についてのみ説明する。
図8に示す半導体装置は、下部にトランジスタ160、161が設けられ、上部にトランジスタ166、167、及び容量素子168、169が設けられている。また、トランジスタ160、166、及び容量素子168により、メモリセル174が構成され、トランジスタ161、167、及び容量素子169により、メモリセル175が構成される。なお、下部に設けられるトランジスタ160、161の構成については、図6(A)に示すトランジスタ160、161と同様であるため、詳細な説明は省略する。
次に、図8に示す半導体装置の作製方法について、図9を参照して説明する。ゲート絶縁層146を成膜する工程までは、実施の形態1及び2と同様であるため、詳細な説明は省略する。
本発明の一形態に係る半導体装置を携帯電話、スマートフォン、電子書籍などの携帯機器に応用した場合について、図10乃至図13を参照して説明する。
本実施の形態では、上述の実施の形態で説明した半導体装置を電子機器に適用する場合について、図14を用いて説明する。本実施の形態では、コンピュータ、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯情報端末(携帯型ゲーム機、音響再生装置なども含む)、デジタルカメラ、デジタルビデオカメラ等のカメラ、電子ペーパー、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)などの電子機器に、上述の半導体装置を記憶装置として適用する場合について説明する。
102a 保護層
102b 保護層
104a 半導体領域
104b 半導体領域
106 素子分離絶縁層
108a ゲート絶縁層
108b ゲート絶縁層
110a ゲート電極
110b ゲート電極
116a チャネル形成領域
116b チャネル形成領域
120a 不純物領域
120b 不純物領域
120c 不純物領域
120d 不純物領域
122 金属層
124a 金属化合物領域
124b 金属化合物領域
124c 金属化合物領域
124d 金属化合物領域
127a マスク
127b マスク
130 絶縁層
142 酸化物半導体層
143 酸化物半導体層
144a チャネル形成領域
144b チャネル形成領域
145a 低抵抗領域
145b 低抵抗領域
145c 低抵抗領域
145d 低抵抗領域
145e 低抵抗領域
146 ゲート絶縁層
148a ゲート電極
148b ゲート電極
148c 電極
148d 電極
150 層間絶縁層
152 層間絶縁層
156 配線
160 トランジスタ
161 トランジスタ
162 トランジスタ
163 トランジスタ
164 容量素子
165 容量素子
166 トランジスタ
167 トランジスタ
168 容量素子
169 容量素子
170 メモリセル
171 メモリセル
172 メモリセル
173 メモリセル
174 メモリセル
175 メモリセル
201 RF回路
202 アナログベースバンド回路
203 デジタルベースバンド回路
204 バッテリー
205 電源回路
206 アプリケーションプロセッサ
207 CPU
208 DSP
209 インターフェース
210 フラッシュメモリ
211 ディスプレイコントローラ
212 メモリ回路
213 ディスプレイ
214 表示部
215 ソースドライバ
216 ゲートドライバ
217 音声回路
218 キーボード
219 タッチセンサ
301 メモリコントローラ
302 メモリ
303 メモリ
304 スイッチ
305 スイッチ
401 バッテリー
402 電源回路
403 マイクロプロセッサ
404 フラッシュメモリ
405 音声回路
406 キーボード
407 メモリ回路
408 タッチパネル
409 ディスプレイ
410 ディスプレイコントローラ
501 トランジスタ
502 トランジスタ
503 トランジスタ
504 トランジスタ
505 トランジスタ
506 トランジスタ
507 Xデコーダー
508 Yデコーダー
511 トランジスタ
512 保持容量
513 Xデコーダー
514 Yデコーダー
701 筐体
702 筐体
703 表示部
704 キーボード
711 本体
712 スタイラス
713 表示部
714 操作ボタン
715 外部インターフェース
721 筐体
723 筐体
725 表示部
727 表示部
731 電源
733 操作キー
735 スピーカー
737 軸部
740 筐体
741 筐体
742 表示パネル
743 スピーカー
744 マイクロフォン
745 操作キー
746 ポインティングデバイス
747 カメラ用レンズ
748 外部接続端子
749 太陽電池セル
750 外部メモリスロット
761 本体
763 接眼部
764 操作スイッチ
765 表示部
766 バッテリー
767 表示部
770 テレビジョン装置
771 筐体
773 表示部
775 スタンド
780 リモコン操作機
Claims (12)
- 第1のトランジスタと、前記第1のトランジスタ上の第2のトランジスタと、を有し、
前記第2のトランジスタは、
酸化物半導体材料を含む半導体層を有し、
前記第1のトランジスタは、
酸化物半導体以外の半導体材料を含む半導体基板に設けられたチャネル形成領域及び不純物領域、並びに、前記半導体層と接する上面を有するゲート電極を有し、
前記不純物領域上に絶縁層が設けられ、
前記ゲート電極の上面及び前記絶縁層の上面は平坦であり、かつ同一の平面にあり、
前記ゲート電極の平坦な上面及び前記絶縁層の平坦な上面に接して前記半導体層の全体が設けられ、
前記半導体層の上面は平坦である、
半導体装置。 - 前記ゲート電極は、前記第2のトランジスタのソース電極及びドレイン電極の一方として機能する、請求項1に記載の半導体装置。
- 第1のトランジスタと、前記第1のトランジスタ上の絶縁層と、前記絶縁層上の第2のトランジスタと、を有し、
前記第1のトランジスタは、
半導体基板に設けられた、第1のチャネル形成領域、並びに前記第1のチャネル形成領域を挟むように設けられた第1の不純物領域及び第2の不純物領域と、
前記第1のチャネル形成領域上の第1のゲート絶縁層と、
前記第1のゲート絶縁層上の第1のゲート電極と、を有し、
前記第2のトランジスタは、
第2のチャネル形成領域、並びに前記第2のチャネル形成領域を挟むように設けられた第1の低抵抗領域及び第2の低抵抗領域を含む半導体層と、
前記半導体層上の第2のゲート絶縁層と、
前記第2のゲート絶縁層上の第2のゲート電極と、を有し、
前記第1の低抵抗領域は前記第2のチャネル形成領域よりも低抵抗な領域を有し、
前記第2の低抵抗領域は前記第2のチャネル形成領域よりも低抵抗な領域を有し、
前記第1のゲート電極の上面が、前記第1の低抵抗領域及び前記第2の低抵抗領域の一方と接して設けられ、
前記半導体層は酸化物半導体材料を含み、
前記半導体基板は酸化物半導体以外の半導体材料を含み、
前記第1の不純物領域上及び第2の不純物領域上に前記絶縁層が設けられ、
前記第1のゲート電極の上面及び前記絶縁層の上面は平坦であり、かつ同一の平面にあり、
前記第1のゲート電極の平坦な上面及び前記絶縁層の平坦な上面に接して前記半導体層の全体が設けられ、
前記半導体層の上面は平坦である、
半導体装置。 - 前記第1のゲート電極は、前記第2のトランジスタのソース電極及びドレイン電極の一方として機能する、請求項3に記載の半導体装置。
- 前記第1の低抵抗領域及び前記第2の低抵抗領域の他方と接して設けられた導電層を有する、請求項3又は4に記載の半導体装置。
- 前記第1のゲート電極上に、前記半導体層及び前記第2のゲート絶縁層を介して重畳するように設けられた導電層を有する、請求項3又は4に記載の半導体装置。
- 前記第1のゲート電極、前記半導体層、前記第2のゲート絶縁層及び前記導電層の積層は、容量素子として機能する、請求項6に記載の半導体装置。
- 前記第1のゲート電極上に、前記半導体層及び前記第2のゲート絶縁層を介して重畳するように設けられた第1の導電層と、
前記第1の低抵抗領域及び前記第2の低抵抗領域の他方と接して設けられた第2の導電層と、を有する請求項3又は4に記載の半導体装置。 - 前記第1のゲート電極、前記半導体層、前記第2のゲート絶縁層及び前記第1の導電層の積層は、容量素子として機能する、請求項8に記載の半導体装置。
- 前記第1のトランジスタは、前記第1の不純物領域及び前記第2の不純物領域に接して設けられたソース電極及びドレイン電極を有する、請求項3乃至9のいずれか一に記載の半導体装置。
- 前記第2のゲート電極は、In−Ga−Zn−O−N系化合物導電体を含む、請求項3乃至10のいずれか一に記載の半導体装置。
- 前記酸化物半導体材料は、c軸配向し、かつab面に垂直な方向から見て三角形状または六角形状の原子配列を有し、
前記ab面において、a軸またはb軸の向きが異なる結晶を含む、請求項1乃至11に記載の半導体装置。
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- 2011-12-26 JP JP2011282898A patent/JP6005356B2/ja not_active Expired - Fee Related
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JP6197087B2 (ja) | 2017-09-13 |
KR101905186B1 (ko) | 2018-10-05 |
US20150279860A1 (en) | 2015-10-01 |
JP2016213506A (ja) | 2016-12-15 |
US9954004B2 (en) | 2018-04-24 |
US20120161220A1 (en) | 2012-06-28 |
US20220115411A1 (en) | 2022-04-14 |
US9048142B2 (en) | 2015-06-02 |
JP2012151463A (ja) | 2012-08-09 |
US20180219028A1 (en) | 2018-08-02 |
KR20120092002A (ko) | 2012-08-20 |
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