JP5738903B2 - 高い静電放電性能を有するフローティングゲート構造 - Google Patents
高い静電放電性能を有するフローティングゲート構造 Download PDFInfo
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- JP5738903B2 JP5738903B2 JP2013001443A JP2013001443A JP5738903B2 JP 5738903 B2 JP5738903 B2 JP 5738903B2 JP 2013001443 A JP2013001443 A JP 2013001443A JP 2013001443 A JP2013001443 A JP 2013001443A JP 5738903 B2 JP5738903 B2 JP 5738903B2
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- 239000004065 semiconductor Substances 0.000 claims description 37
- 239000010405 anode material Substances 0.000 claims 1
- 238000010276 construction Methods 0.000 claims 1
- 239000000463 material Substances 0.000 description 26
- 230000015556 catabolic process Effects 0.000 description 20
- 238000000034 method Methods 0.000 description 15
- 238000013461 design Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000005421 electrostatic potential Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 230000003467 diminishing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0626—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a localised breakdown region, e.g. built-in avalanching region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/866—Zener diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
Claims (10)
- フローティング・ゲート・デバイスを含む半導体構造であって、
前記フローティング・ゲート・デバイスは、第1のフローティング・ゲートと、第2のフローティング・ゲートと、スタックと、を備え、
前記第1のフローティング・ゲート、前記第2のフローティング・ゲートは、前記スタックに対して互いに反対側に隣接して配置されており、
前記スタックは、第1のタイプのダイオードと、第2のタイプのダイオードと、を含み、前記スタックは、さらに、第1のドーピングタイプの半導体層と、第2のドーピングタイプの複数の半導体領域と、を備え、前記複数の半導体領域は前記半導体層上に配置され、前記半導体層の上方表面の境界内に配置されている、半導体構造。 - 前記第1のタイプのダイオードは、p/n型ダイオード含む、請求項1に記載の半導体構造。
- 前記第2のタイプのダイオードは、ツェナーダイオードを含む、請求項2に記載の半導体構造。
- 前記p/n型ダイオードと前記ツェナーダイオードは、共通のカソードを含む、請求項3に記載の半導体構造。
- 出力パッドに接続された複数の第1のフィンガと、
前記第1のフィンガ間に交互に配置されて、グランドパッドに接続されている複数の第2のフィンガと、
前記第1および第2のフィンガ間に設けられた複数のフローティング・ゲートと、
を含む静電放電保護のための半導体構造であって、
前記第1のフィンガはスタックを含み、当該スタックは、第1のタイプのダイオードと、第2のタイプのダイオードと、を含み、
前記複数のフローティング・ゲートの第1のフローティング・ゲート、第2のフローティング・ゲートは、前記スタックに対して互いに反対側に隣接して配置されており、前記スタックは、さらに、第1のドーピングタイプの半導体層と、第2のドーピングタイプの複数の半導体領域と、を備え、前記複数の半導体領域は前記半導体層上に配置され、前記半導体層の上方表面の境界内に配置されている、半導体構造。 - 前記第2のタイプのダイオードは、ツェナーダイオードを含む、請求項5に記載の半導体構造。
- 前記第1のタイプのダイオードは、p/nダイオードを含む、請求項6に記載の半導体構造。
- 前記p/nダイオードは、アノード材料からなるウェルを含む、請求項7に記載の半導体構造。
- 前記ツェナーダイオードと前記p/nダイオードは共通のカソードを共有している、請求項8に記載の半導体構造。
- オフチップ出力を駆動する回路を含む半導体構造であって、
前記回路は、プルダウンデバイスと、第1のフローティング・ゲートと、第2のフローティング・ゲートと、スタックと、を含んでおり、
前記第1のフローティング・ゲート、前記第2のフローティング・ゲートは、前記スタックに対して互いに反対側に隣接して配置されており、
前記スタックは、第1のタイプのダイオードと、第2のタイプのダイオードと、を含み、前記スタックは、さらに、第1のドーピングタイプの半導体層と、第2のドーピングタイプの複数の半導体領域と、を備え、前記複数の半導体領域は前記半導体層上に配置され、前記半導体層の上方表面の境界内に配置されている、半導体構造。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US76008106P | 2006-01-18 | 2006-01-18 | |
US60/760,081 | 2006-01-18 |
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JP2008551423A Division JP2009524248A (ja) | 2006-01-18 | 2007-01-18 | 高い静電放電性能を有するフローティングゲート構造 |
Publications (2)
Publication Number | Publication Date |
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JP2013123060A JP2013123060A (ja) | 2013-06-20 |
JP5738903B2 true JP5738903B2 (ja) | 2015-06-24 |
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JP2008551423A Pending JP2009524248A (ja) | 2006-01-18 | 2007-01-18 | 高い静電放電性能を有するフローティングゲート構造 |
JP2013001443A Active JP5738903B2 (ja) | 2006-01-18 | 2013-01-09 | 高い静電放電性能を有するフローティングゲート構造 |
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JP2008551423A Pending JP2009524248A (ja) | 2006-01-18 | 2007-01-18 | 高い静電放電性能を有するフローティングゲート構造 |
Country Status (7)
Country | Link |
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US (1) | US9111754B2 (ja) |
EP (1) | EP1977450B1 (ja) |
JP (2) | JP2009524248A (ja) |
KR (1) | KR101139438B1 (ja) |
CN (1) | CN101361193B (ja) |
TW (1) | TWI435430B (ja) |
WO (1) | WO2007084688A1 (ja) |
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JP5296450B2 (ja) * | 2008-08-13 | 2013-09-25 | セイコーインスツル株式会社 | 半導体装置 |
DE102008047850B4 (de) | 2008-09-18 | 2015-08-20 | Austriamicrosystems Ag | Halbleiterkörper mit einer Schutzstruktur und Verfahren zum Herstellen derselben |
US9124354B2 (en) * | 2011-05-12 | 2015-09-01 | St-Ericsson Sa | Isolation and protection circuit for a receiver in a wireless communication device |
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EP1977450A1 (en) | 2008-10-08 |
WO2007084688A1 (en) | 2007-07-26 |
KR101139438B1 (ko) | 2012-04-27 |
US20070236843A1 (en) | 2007-10-11 |
CN101361193B (zh) | 2013-07-10 |
EP1977450A4 (en) | 2010-07-21 |
TW200735324A (en) | 2007-09-16 |
CN101361193A (zh) | 2009-02-04 |
US9111754B2 (en) | 2015-08-18 |
TWI435430B (zh) | 2014-04-21 |
JP2009524248A (ja) | 2009-06-25 |
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JP2013123060A (ja) | 2013-06-20 |
EP1977450B1 (en) | 2015-06-10 |
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