JP5699878B2 - 炭化珪素半導体装置およびその製造方法 - Google Patents
炭化珪素半導体装置およびその製造方法 Download PDFInfo
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- JP5699878B2 JP5699878B2 JP2011200247A JP2011200247A JP5699878B2 JP 5699878 B2 JP5699878 B2 JP 5699878B2 JP 2011200247 A JP2011200247 A JP 2011200247A JP 2011200247 A JP2011200247 A JP 2011200247A JP 5699878 B2 JP5699878 B2 JP 5699878B2
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- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H01L29/0692—Surface layout
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Description
主に図1〜図3を参照して、本実施の形態における半導体装置は、トレンチゲートを有する縦型MOSFETである。この半導体装置は、炭化珪素からなる基板1と、基板1の主表面MS上にエピタキシャルに形成された炭化珪素層とを有する。炭化珪素層は、導電型がn型であるエピタキシャル層である耐圧保持層2と、導電型がp型であるp型ボディ層3(p型半導体層3)と、導電型がn型であるn型ソースコンタクト層4と、導電型がp型であるコンタクト領域5とを有する。
上記実施の形態1における半導体装置は、側壁20aおよび20bを有する溝6(図5)を含むMOSFETである。実施の形態2における半導体装置は、同様の溝6を有する絶縁ゲートバイポーラトランジスタ(IGBT)である。以下にその詳細について説明する。
ゲート電極9に負の電圧を印加し、当該負の電圧が閾値を超えると、ゲート電極9側方のゲート絶縁膜8に接するp型半導体層33の溝6に対向する端部領域(チャネル領域)に反転層が形成され、エミッタ領域であるn型ソースコンタクト層34と耐圧保持層であるn型エピタキシャル層32とが電気的に接続される。これにより、エミッタ領域であるn型ソースコンタクト層34から耐圧保持層であるn型エピタキシャル層32に電子が注入され、これに対応して基板31からバッファ層であるp型エピタキシャル層36を介して正孔がn型エピタキシャル層32に供給される。その結果、n型エピタキシャル層32に伝導度変調が生じることで、エミッタ電極であるソース電極12-コレクタ電極であるドレイン電極14間の抵抗が著しく低下する。すなわちIGBTがオン状態となる。
Claims (6)
- 単結晶構造を有する炭化珪素から作られ、基準面から5度以内のオフ角を有する主表面が設けられた基板を備え、
前記基準面は、{000−1}面であり、
前記基板の前記主表面上にエピタキシャルに形成された炭化珪素層を備え、
前記炭化珪素層には、互いに対向する第1および第2の側壁を有する溝が設けられており、前記第1および第2の側壁の各々はチャネル領域が形成される領域を含み、
前記第1および第2の側壁の各々は、{0−33−8}面を有する第1の面と、前記第1の面とは面方位が異なる第2の面とで構成される複合面を含む、炭化珪素半導体装置。 - 前記オフ角は0.5度以上である、請求項1に記載の炭化珪素半導体装置。
- 前記主表面に対する前記第1および第2の側壁の各々の傾きの差異が10度以下である、請求項1または請求項2に記載の炭化珪素半導体装置。
- 単結晶構造を有する炭化珪素から作られ、{000−1}面である基準面から5度以内のオフ角を有する主表面が設けられた第1導電型の基板を準備する工程と、
前記基板の前記主表面上にエピタキシャルに炭化珪素層を形成する工程と、
前記炭化珪素層にチャネル領域を形成するための第2導電型の不純物領域を形成する工程と、
前記炭化珪素層上に、パターンを有するマスク層を設ける工程と、
前記マスク層をマスクとして用いて、酸素および塩素を含有する反応ガス中で前記炭化珪素層を加熱しながら部分的にエッチングすることにより、前記チャネル領域が形成される領域を含み、{0−33−8}面を有する第1の面と、前記第1の面とは面方位が異なる第2の面とで構成される複合面を含み、互いに対向する第1および第2の側壁を有する溝を形成する工程と、
を備えた、炭化珪素半導体装置の製造方法。 - 前記エッチングする工程は、塩素の流量に対する酸素の流量の比率が0.1以上2.0以下となる条件で前記炭化珪素層に前記反応ガスを供給する工程を含む、請求項4に記載の炭化珪素半導体装置の製造方法。
- 前記エッチングする工程は、前記炭化珪素層の温度を700℃以上1200℃以下とする工程を含む、請求項4または請求項5に記載の炭化珪素半導体装置の製造方法。
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CN102576723B (zh) | 2009-10-23 | 2014-09-24 | 松下电器产业株式会社 | 半导体装置及其制造方法 |
US20110233560A1 (en) | 2010-03-16 | 2011-09-29 | Advanced Interconnect Materials, Llc | Electrode for silicon carbide, silicon carbide semiconductor element, silicon carbide semiconductor device and method for forming electrode for silicon carbide |
JP5707770B2 (ja) * | 2010-08-03 | 2015-04-30 | 住友電気工業株式会社 | 半導体装置およびその製造方法 |
US8981384B2 (en) | 2010-08-03 | 2015-03-17 | Sumitomo Electric Industries, Ltd. | Semiconductor device and method for manufacturing same |
JP5510309B2 (ja) | 2010-12-22 | 2014-06-04 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
JP5668576B2 (ja) | 2011-04-01 | 2015-02-12 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
KR101584023B1 (ko) * | 2011-08-26 | 2016-01-08 | 고쿠리츠다이가쿠호징 나라 센탄카가쿠기쥬츠 다이가쿠인 다이가쿠 | SiC반도체소자 및 그 제조방법 |
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US9012922B2 (en) | 2015-04-21 |
JP2013062392A (ja) | 2013-04-04 |
KR20140060264A (ko) | 2014-05-19 |
WO2013038860A1 (ja) | 2013-03-21 |
US20130062629A1 (en) | 2013-03-14 |
CN103718298A (zh) | 2014-04-09 |
EP2757588A1 (en) | 2014-07-23 |
EP2757588A4 (en) | 2015-06-24 |
CN103718298B (zh) | 2016-08-03 |
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