JP5610759B2 - Ｓｏｉ基板の作製方法、半導体装置の作製方法 - Google Patents

Ｓｏｉ基板の作製方法、半導体装置の作製方法 Download PDF

Info

Publication number
JP5610759B2
JP5610759B2 JP2009280207A JP2009280207A JP5610759B2 JP 5610759 B2 JP5610759 B2 JP 5610759B2 JP 2009280207 A JP2009280207 A JP 2009280207A JP 2009280207 A JP2009280207 A JP 2009280207A JP 5610759 B2 JP5610759 B2 JP 5610759B2
Authority
JP
Japan
Prior art keywords
substrate
single crystal
semiconductor layer
crystal semiconductor
oxygen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009280207A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010166035A5 (enExample
JP2010166035A (ja
Inventor
大沼　英人
英人 大沼
純平 桃
純平 桃
山崎　舜平
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2009280207A priority Critical patent/JP5610759B2/ja
Publication of JP2010166035A publication Critical patent/JP2010166035A/ja
Publication of JP2010166035A5 publication Critical patent/JP2010166035A5/ja
Application granted granted Critical
Publication of JP5610759B2 publication Critical patent/JP5610759B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H10P90/1916—
    • H10P90/1906—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H10P14/3458—
    • H10P30/20—
    • H10P34/42—
    • H10P95/90—
    • H10W10/181—

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
JP2009280207A 2008-12-15 2009-12-10 Ｓｏｉ基板の作製方法、半導体装置の作製方法 Expired - Fee Related JP5610759B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009280207A JP5610759B2 (ja) 2008-12-15 2009-12-10 Ｓｏｉ基板の作製方法、半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008318377 2008-12-15
JP2008318377 2008-12-15
JP2009280207A JP5610759B2 (ja) 2008-12-15 2009-12-10 Ｓｏｉ基板の作製方法、半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2010166035A JP2010166035A (ja) 2010-07-29
JP2010166035A5 JP2010166035A5 (enExample) 2012-11-29
JP5610759B2 true JP5610759B2 (ja) 2014-10-22

Family

ID=42241035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009280207A Expired - Fee Related JP5610759B2 (ja) 2008-12-15 2009-12-10 Ｓｏｉ基板の作製方法、半導体装置の作製方法

Country Status (5)

Country Link
US (1) US8394703B2 (enExample)
JP (1) JP5610759B2 (enExample)
KR (2) KR20100069595A (enExample)
CN (1) CN101752294B (enExample)
SG (2) SG162675A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2972564B1 (fr) * 2011-03-08 2016-11-04 S O I Tec Silicon On Insulator Tech Procédé de traitement d'une structure de type semi-conducteur sur isolant
TWI664731B (zh) * 2013-05-20 2019-07-01 半導體能源研究所股份有限公司 半導體裝置
US9425063B2 (en) * 2014-06-19 2016-08-23 Infineon Technologies Ag Method of reducing an impurity concentration in a semiconductor body, method of manufacturing a semiconductor device and semiconductor device
WO2016083952A1 (en) 2014-11-28 2016-06-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, module, and electronic device
JP6850096B2 (ja) * 2015-09-24 2021-03-31 株式会社半導体エネルギー研究所 半導体装置の作製方法及び電子機器の作製方法
US10026843B2 (en) 2015-11-30 2018-07-17 Taiwan Semiconductor Manufacturing Co., Ltd. Fin structure of semiconductor device, manufacturing method thereof, and manufacturing method of active region of semiconductor device
US11255606B2 (en) * 2015-12-30 2022-02-22 Mattson Technology, Inc. Gas flow control for millisecond anneal system
JP6579086B2 (ja) * 2016-11-15 2019-09-25 信越半導体株式会社 デバイス形成方法
JP2020508564A (ja) * 2017-02-21 2020-03-19 エーファウ・グループ・エー・タルナー・ゲーエムベーハー 基板を接合する方法および装置
KR102791109B1 (ko) 2019-06-14 2025-04-07 삼성전자주식회사 집적 회로 반도체 소자의 제조 방법

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6384013A (ja) * 1986-09-27 1988-04-14 Agency Of Ind Science & Technol 半導体結晶層の製造方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
TW264575B (enExample) 1993-10-29 1995-12-01 Handotai Energy Kenkyusho Kk
US5923962A (en) 1993-10-29 1999-07-13 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
US6444506B1 (en) 1995-10-25 2002-09-03 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing silicon thin film devices using laser annealing in a hydrogen mixture gas followed by nitride formation
US6391690B2 (en) 1995-12-14 2002-05-21 Seiko Epson Corporation Thin film semiconductor device and method for producing the same
US5970368A (en) 1996-09-30 1999-10-19 Kabushiki Kaisha Toshiba Method for manufacturing polycrystal semiconductor film
JPH1140501A (ja) 1997-05-20 1999-02-12 Fujitsu Ltd 半導体装置の製造方法及び半導体装置
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
JP3349931B2 (ja) 1997-10-30 2002-11-25 松下電器産業株式会社 半導体レーザ装置の製造方法
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP2000082679A (ja) 1998-07-08 2000-03-21 Canon Inc 半導体基板とその作製方法
JP3345363B2 (ja) * 1998-12-07 2002-11-18 富士通株式会社 多結晶シリコン薄膜の形成方法及び薄膜トランジスタの製造方法
US7153729B1 (en) 1998-07-15 2006-12-26 Semiconductor Energy Laboratory Co., Ltd. Crystalline semiconductor thin film, method of fabricating the same, semiconductor device, and method of fabricating the same
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3794876B2 (ja) 1998-09-09 2006-07-12 松下電器産業株式会社 半導体装置の製造方法
JP4101409B2 (ja) 1999-08-19 2008-06-18 シャープ株式会社 半導体装置の製造方法
US7052943B2 (en) 2001-03-16 2006-05-30 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
US7253032B2 (en) 2001-04-20 2007-08-07 Semiconductor Energy Laboratory Co., Ltd. Method of flattening a crystallized semiconductor film surface by using a plate
TW544938B (en) 2001-06-01 2003-08-01 Semiconductor Energy Lab Method of manufacturing a semiconductor device
US7119365B2 (en) 2002-03-26 2006-10-10 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
JP2004006700A (ja) 2002-03-27 2004-01-08 Seiko Epson Corp 表面処理方法、表面処理基板、膜パターンの形成方法、電気光学装置の製造方法、電気光学装置、及び電子機器
JP4610178B2 (ja) * 2002-11-15 2011-01-12 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4759919B2 (ja) * 2004-01-16 2011-08-31 セイコーエプソン株式会社 電気光学装置の製造方法
JP5110772B2 (ja) 2004-02-03 2012-12-26 株式会社半導体エネルギー研究所 半導体薄膜層を有する基板の製造方法
US20070117287A1 (en) 2005-11-23 2007-05-24 Semiconductor Energy Laboratory Co., Ltd. Laser irradiation apparatus
US7579654B2 (en) 2006-05-31 2009-08-25 Corning Incorporated Semiconductor on insulator structure made using radiation annealing
CN101281912B (zh) 2007-04-03 2013-01-23 株式会社半导体能源研究所 Soi衬底及其制造方法以及半导体装置
KR101440930B1 (ko) * 2007-04-20 2014-09-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Ｓｏｉ 기판의 제작방법
US7960262B2 (en) 2007-05-18 2011-06-14 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device by applying laser beam to single-crystal semiconductor layer and non-single-crystal semiconductor layer through cap film
US7745268B2 (en) 2007-06-01 2010-06-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device with irradiation of single crystal semiconductor layer in an inert atmosphere
US7776718B2 (en) 2007-06-25 2010-08-17 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor substrate with reduced gap size between single-crystalline layers
US7795111B2 (en) 2007-06-27 2010-09-14 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate and manufacturing method of semiconductor device
JP5442224B2 (ja) 2007-07-23 2014-03-12 株式会社半導体エネルギー研究所 Ｓｏｉ基板の製造方法
KR101499175B1 (ko) 2007-10-04 2015-03-05 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판의 제조방법
US7799658B2 (en) 2007-10-10 2010-09-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device
CN101842910B (zh) 2007-11-01 2013-03-27 株式会社半导体能源研究所 用于制造光电转换器件的方法
US7851318B2 (en) 2007-11-01 2010-12-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device
US7816232B2 (en) * 2007-11-27 2010-10-19 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate and semiconductor substrate manufacturing apparatus
JP5248994B2 (ja) 2007-11-30 2013-07-31 株式会社半導体エネルギー研究所 光電変換装置の製造方法
JP5286046B2 (ja) 2007-11-30 2013-09-11 株式会社半導体エネルギー研究所 光電変換装置の製造方法
JP5248995B2 (ja) 2007-11-30 2013-07-31 株式会社半導体エネルギー研究所 光電変換装置の製造方法
US7947523B2 (en) 2008-04-25 2011-05-24 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
JP5552276B2 (ja) 2008-08-01 2014-07-16 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法

Also Published As

Publication number Publication date
SG162675A1 (en) 2010-07-29
US20100151663A1 (en) 2010-06-17
CN101752294B (zh) 2015-02-25
US8394703B2 (en) 2013-03-12
KR20160120266A (ko) 2016-10-17
JP2010166035A (ja) 2010-07-29
SG182208A1 (en) 2012-07-30
KR20100069595A (ko) 2010-06-24
CN101752294A (zh) 2010-06-23

Similar Documents

Publication Publication Date Title
JP5610759B2 (ja) Ｓｏｉ基板の作製方法、半導体装置の作製方法
CN101562153B (zh) 半导体装置及半导体装置的制造方法
TWI478280B (zh) Ｓｏｉ基板的製造方法、和半導體裝置的製造方法
JP5548351B2 (ja) 半導体装置の作製方法
JP5706670B2 (ja) Ｓｏｉ基板の作製方法
US8653536B2 (en) Method for manufacturing semiconductor substrate, and semiconductor device
JP2012164975A (ja) Ｓｏｉ基板の作製方法
JP2008277696A (ja) 半導体装置の製造方法
US8043937B2 (en) Method for manufacturing semiconductor substrate
US8349702B2 (en) Method for manufacturing semiconductor substrate
JP5559984B2 (ja) 半導体装置の作製方法
JP2009260299A (ja) 半導体基板の作製方法及び半導体装置
JP5977947B2 (ja) Ｓｏｉ基板の作製方法
JP7155759B2 (ja) 半導体装置及び半導体装置の製造方法
JP2010141246A (ja) 半導体装置の製造方法
JP5633328B2 (ja) 半導体装置の製造方法
JP5292810B2 (ja) Ｓｏｉ基板の製造方法
JP2010258305A (ja) 半導体装置の製造方法
JP5576617B2 (ja) 単結晶半導体層の結晶性評価方法
JP5851113B2 (ja) Ｓｏｉ基板の作製方法
JP2012069927A (ja) Ｓｏｉ基板の作製方法
JP4539098B2 (ja) 貼り合わせ基板の製造方法
JPWO2006013898A1 (ja) 半導体装置の製造方法
JP5669439B2 (ja) 半導体基板の作製方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121010

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20121010

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140213

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140218

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140403

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140826

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140902

R150 Certificate of patent or registration of utility model

Ref document number: 5610759

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees