JP5561460B2 - 配線基板および配線基板の製造方法 - Google Patents
配線基板および配線基板の製造方法 Download PDFInfo
- Publication number
- JP5561460B2 JP5561460B2 JP2009133604A JP2009133604A JP5561460B2 JP 5561460 B2 JP5561460 B2 JP 5561460B2 JP 2009133604 A JP2009133604 A JP 2009133604A JP 2009133604 A JP2009133604 A JP 2009133604A JP 5561460 B2 JP5561460 B2 JP 5561460B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode pad
- plating film
- insulating layer
- wiring board
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/094—Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0361—Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
- H10W76/12—Containers or parts thereof characterised by their shape
- H10W76/15—Containers comprising an insulating or insulated base
- H10W76/153—Containers comprising an insulating or insulated base having interconnections in passages through the insulating or insulated base
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Wire Bonding (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009133604A JP5561460B2 (ja) | 2009-06-03 | 2009-06-03 | 配線基板および配線基板の製造方法 |
| KR1020100050936A KR101610969B1 (ko) | 2009-06-03 | 2010-05-31 | 배선기판 및 그 제조방법 |
| US12/792,096 US8476754B2 (en) | 2009-06-03 | 2010-06-02 | Wiring substrate and method of manufacturing the same |
| TW099117888A TWI487450B (zh) | 2009-06-03 | 2010-06-03 | 佈線基板及其製造方法 |
| US13/906,566 US8749046B2 (en) | 2009-06-03 | 2013-05-31 | Wiring substrate and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009133604A JP5561460B2 (ja) | 2009-06-03 | 2009-06-03 | 配線基板および配線基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010283044A JP2010283044A (ja) | 2010-12-16 |
| JP2010283044A5 JP2010283044A5 (https=) | 2012-05-24 |
| JP5561460B2 true JP5561460B2 (ja) | 2014-07-30 |
Family
ID=43300151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009133604A Active JP5561460B2 (ja) | 2009-06-03 | 2009-06-03 | 配線基板および配線基板の製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US8476754B2 (https=) |
| JP (1) | JP5561460B2 (https=) |
| KR (1) | KR101610969B1 (https=) |
| TW (1) | TWI487450B (https=) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101559958B1 (ko) * | 2009-12-18 | 2015-10-13 | 삼성전자주식회사 | 3차원 반도체 장치의 제조 방법 및 이에 따라 제조된 3차원 반도체 장치 |
| JP5603600B2 (ja) * | 2010-01-13 | 2014-10-08 | 新光電気工業株式会社 | 配線基板及びその製造方法、並びに半導体パッケージ |
| JP5826532B2 (ja) * | 2010-07-15 | 2015-12-02 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| TWI495051B (zh) * | 2011-07-08 | 2015-08-01 | 欣興電子股份有限公司 | 無核心層之封裝基板及其製法 |
| US20130168132A1 (en) * | 2011-12-29 | 2013-07-04 | Sumsung Electro-Mechanics Co., Ltd. | Printed circuit board and method of manufacturing the same |
| TWI557855B (zh) * | 2011-12-30 | 2016-11-11 | 旭德科技股份有限公司 | 封裝載板及其製作方法 |
| US8969730B2 (en) * | 2012-08-16 | 2015-03-03 | Apple Inc. | Printed circuit solder connections |
| US9716051B2 (en) * | 2012-11-02 | 2017-07-25 | Nvidia Corporation | Open solder mask and or dielectric to increase lid or ring thickness and contact area to improve package coplanarity |
| JP6105316B2 (ja) * | 2013-02-19 | 2017-03-29 | 京セラ株式会社 | 電子装置 |
| JP2014207388A (ja) * | 2013-04-15 | 2014-10-30 | 株式会社東芝 | 半導体パッケージ |
| CN107170689B (zh) * | 2013-06-11 | 2019-12-31 | 唐山国芯晶源电子有限公司 | 芯片封装基板 |
| KR101516072B1 (ko) * | 2013-07-09 | 2015-04-29 | 삼성전기주식회사 | 반도체 패키지 및 그 제조 방법 |
| CN104576596B (zh) * | 2013-10-25 | 2019-01-01 | 日月光半导体制造股份有限公司 | 半导体基板及其制造方法 |
| US10276562B2 (en) * | 2014-01-07 | 2019-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device with multiple threshold voltage and method of fabricating the same |
| US20150255366A1 (en) * | 2014-03-06 | 2015-09-10 | Apple Inc. | Embedded system in package |
| JP6351371B2 (ja) * | 2014-05-19 | 2018-07-04 | 太陽誘電株式会社 | 弾性波デバイス |
| CN106455933B (zh) * | 2014-06-20 | 2018-10-30 | 奥林巴斯株式会社 | 缆线连接构造和内窥镜装置 |
| JP6314731B2 (ja) * | 2014-08-01 | 2018-04-25 | 株式会社ソシオネクスト | 半導体装置及び半導体装置の製造方法 |
| TWI570816B (zh) * | 2014-09-26 | 2017-02-11 | 矽品精密工業股份有限公司 | 封裝結構及其製法 |
| JP6503687B2 (ja) * | 2014-10-23 | 2019-04-24 | イビデン株式会社 | プリント配線板 |
| JP2016152262A (ja) * | 2015-02-16 | 2016-08-22 | イビデン株式会社 | プリント配線板 |
| JP6550260B2 (ja) * | 2015-04-28 | 2019-07-24 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| TWI575619B (zh) * | 2015-12-09 | 2017-03-21 | 南茂科技股份有限公司 | 半導體封裝結構及其製作方法 |
| TWI621194B (zh) * | 2017-06-28 | 2018-04-11 | 中華精測科技股份有限公司 | 測試介面板組件 |
| TWI612599B (zh) * | 2017-06-28 | 2018-01-21 | Chunghwa Precision Test Tech Co., Ltd. | 測試介面板組件及其製造方法 |
| US10930574B2 (en) * | 2018-05-01 | 2021-02-23 | Rohm Co., Ltd. | Semiconductor device and method for manufacturing the same |
| WO2020090601A1 (ja) * | 2018-10-30 | 2020-05-07 | 凸版印刷株式会社 | 半導体パッケージ用配線基板及び半導体パッケージ用配線基板の製造方法 |
| CN111341750B (zh) | 2018-12-19 | 2024-03-01 | 奥特斯奥地利科技与系统技术有限公司 | 包括有导电基部结构的部件承载件及制造方法 |
| CN111599687B (zh) * | 2019-02-21 | 2022-11-15 | 奥特斯科技(重庆)有限公司 | 具有高刚度的超薄部件承载件及其制造方法 |
| US12205877B2 (en) | 2019-02-21 | 2025-01-21 | AT&S(Chongqing) Company Limited | Ultra-thin component carrier having high stiffness and method of manufacturing the same |
| US20200279814A1 (en) * | 2019-02-28 | 2020-09-03 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
| JP7335036B2 (ja) | 2019-03-29 | 2023-08-29 | ラピスセミコンダクタ株式会社 | 半導体パッケージの製造方法 |
| JP2021132068A (ja) * | 2020-02-18 | 2021-09-09 | イビデン株式会社 | プリント配線板、プリント配線板の製造方法 |
| JP7528557B2 (ja) * | 2020-06-19 | 2024-08-06 | 日本電気株式会社 | 量子デバイス及びその製造方法 |
| US20220069489A1 (en) * | 2020-08-28 | 2022-03-03 | Unimicron Technology Corp. | Circuit board structure and manufacturing method thereof |
| US11798897B2 (en) * | 2021-03-26 | 2023-10-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and methods of manufacturing the same |
| US20230095608A1 (en) * | 2021-09-24 | 2023-03-30 | Intel Corporation | Conformal power delivery structures including embedded passive devices |
| CN116528466A (zh) * | 2022-01-21 | 2023-08-01 | 奥特斯奥地利科技与系统技术有限公司 | 具有突出部的部件承载件和制造方法 |
| TWI831123B (zh) * | 2022-01-28 | 2024-02-01 | 巨擘科技股份有限公司 | 多層基板表面處理層結構 |
| KR20230135215A (ko) * | 2022-03-15 | 2023-09-25 | 삼성디스플레이 주식회사 | 회로 기판 및 이를 포함하는 표시 장치 |
| CN120413436A (zh) * | 2025-04-27 | 2025-08-01 | 无锡中微高科电子有限公司 | Fc-pbga电路翘曲应力的平衡方法及系统 |
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| JPH0368163A (ja) * | 1989-06-28 | 1991-03-25 | Hitachi Ltd | 半導体装置 |
| JPH10233573A (ja) * | 1997-02-20 | 1998-09-02 | Sony Corp | プリント配線板及び部品実装方法 |
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| EP1744609B1 (en) * | 1999-06-02 | 2012-12-12 | Ibiden Co., Ltd. | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board |
| JP3546961B2 (ja) | 2000-10-18 | 2004-07-28 | 日本電気株式会社 | 半導体装置搭載用配線基板およびその製造方法、並びに半導体パッケージ |
| JP2003218249A (ja) | 2002-01-18 | 2003-07-31 | Mitsui Chemicals Inc | 半導体中空パッケージ |
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| JP2008071953A (ja) * | 2006-09-14 | 2008-03-27 | Nec Electronics Corp | 半導体装置 |
| JP5214139B2 (ja) * | 2006-12-04 | 2013-06-19 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JP5032187B2 (ja) * | 2007-04-17 | 2012-09-26 | 新光電気工業株式会社 | 配線基板の製造方法及び半導体装置の製造方法及び配線基板 |
| US8482119B2 (en) * | 2008-06-24 | 2013-07-09 | Infineon Technologies Ag | Semiconductor chip assembly |
| US7964974B2 (en) * | 2008-12-02 | 2011-06-21 | General Electric Company | Electronic chip package with reduced contact pad pitch |
-
2009
- 2009-06-03 JP JP2009133604A patent/JP5561460B2/ja active Active
-
2010
- 2010-05-31 KR KR1020100050936A patent/KR101610969B1/ko active Active
- 2010-06-02 US US12/792,096 patent/US8476754B2/en active Active
- 2010-06-03 TW TW099117888A patent/TWI487450B/zh active
-
2013
- 2013-05-31 US US13/906,566 patent/US8749046B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20130256012A1 (en) | 2013-10-03 |
| US8749046B2 (en) | 2014-06-10 |
| KR20100130555A (ko) | 2010-12-13 |
| JP2010283044A (ja) | 2010-12-16 |
| TWI487450B (zh) | 2015-06-01 |
| KR101610969B1 (ko) | 2016-04-08 |
| US8476754B2 (en) | 2013-07-02 |
| TW201108905A (en) | 2011-03-01 |
| US20100308451A1 (en) | 2010-12-09 |
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