JP5350681B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5350681B2 JP5350681B2 JP2008145372A JP2008145372A JP5350681B2 JP 5350681 B2 JP5350681 B2 JP 5350681B2 JP 2008145372 A JP2008145372 A JP 2008145372A JP 2008145372 A JP2008145372 A JP 2008145372A JP 5350681 B2 JP5350681 B2 JP 5350681B2
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- 239000004065 semiconductor Substances 0.000 title claims description 54
- 239000010949 copper Substances 0.000 claims description 40
- 239000002184 metal Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 150000002739 metals Chemical class 0.000 claims description 2
- 239000000126 substance Substances 0.000 description 24
- 238000000034 method Methods 0.000 description 23
- 239000010410 layer Substances 0.000 description 21
- 230000008569 process Effects 0.000 description 19
- 238000004140 cleaning Methods 0.000 description 9
- 238000001514 detection method Methods 0.000 description 9
- 239000011229 interlayer Substances 0.000 description 9
- 239000003963 antioxidant agent Substances 0.000 description 8
- 230000003078 antioxidant effect Effects 0.000 description 8
- 238000005498 polishing Methods 0.000 description 7
- 230000004888 barrier function Effects 0.000 description 6
- 239000005416 organic matter Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000003064 anti-oxidating effect Effects 0.000 description 2
- 239000002738 chelating agent Substances 0.000 description 2
- 239000003638 chemical reducing agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000011179 visual inspection Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000013212 metal-organic material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 230000036962 time dependent Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 229910021642 ultra pure water Inorganic materials 0.000 description 1
- 239000012498 ultrapure water Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
- H01L21/02074—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a planarization of conductive layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5286—Arrangements of power or ground buses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
距離0.3μm: 3atmic%
距離0.5μm: 検出限界以下
距離0.7μm: 検出限界以下
距離1.4μm: 検出限界以下
であった。したがって、太幅配線である配線12と細幅配線である配線14との間隔が0.5μm未満で配置され、かつ太幅配線である配線12と細幅配線である配線16との間隔が0.5μm以下で配置された場合に、配線14と配線16が同電位を有するように構成する必要がある。
12 配線(第1の配線)
14 配線(第2の配線)
16 配線(第3の配線)
18 層間絶縁膜
20 配線溝
22 配線溝
24 配線溝
26 Cu膜
28 酸化防止膜
30 Cu
32 Cuと有機物を含む錯体
34 酸化防止膜
Claims (8)
- ダマシン配線からなる配線層を有する半導体装置において、
0.5μm以上の幅を有する第1の配線と、
前記第1の配線に隣接し前記第1の配線から0.5μm未満の間隔で配置された第2の配線と、
前記第2の配線に隣接し前記第1の配線から0.5μm以下の間隔で配置された第3の配線と、を備え、
前記第2および第3の配線は同電位を有するよう構成されていることを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記第1の配線と前記第2の配線の間隔が0.2μm以上である半導体装置。 - 請求項1または2に記載の半導体装置において、
前記第1、第2、および第3の配線は平行に配置されている半導体装置。 - 請求項1乃至3いずれかに記載の半導体装置において、
前記第2の配線と前記第3の配線の配線ピッチが、0.15μm未満である半導体装置。 - 請求項1乃至4いずれかに記載の半導体装置において、
前記第2および第3の配線は、最小ピッチ配線である半導体装置。 - 請求項1乃至5いずれかに記載の半導体装置において、
前記第2および第3の配線は接地電位を有する半導体装置。 - 請求項1乃至5いずれかに記載の半導体装置において、
前記第2および第3の配線は電源電位を有する半導体装置。 - 請求項1乃至7いずれかに記載の半導体装置において、
前記第1、第2、および第3の配線は、銅含有金属である半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008145372A JP5350681B2 (ja) | 2008-06-03 | 2008-06-03 | 半導体装置 |
US12/474,526 US8299621B2 (en) | 2008-06-03 | 2009-05-29 | Semiconductor device having wiring layer with a wide wiring and fine wirings |
US13/561,752 US8426975B2 (en) | 2008-06-03 | 2012-07-30 | Semiconductor device having wiring layer with a wide wiring and fine wirings |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008145372A JP5350681B2 (ja) | 2008-06-03 | 2008-06-03 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009295653A JP2009295653A (ja) | 2009-12-17 |
JP5350681B2 true JP5350681B2 (ja) | 2013-11-27 |
Family
ID=41378787
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008145372A Active JP5350681B2 (ja) | 2008-06-03 | 2008-06-03 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (2) | US8299621B2 (ja) |
JP (1) | JP5350681B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9553043B2 (en) * | 2012-04-03 | 2017-01-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structure having smaller transition layer via |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10294366A (ja) * | 1997-04-21 | 1998-11-04 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US6265780B1 (en) * | 1998-12-01 | 2001-07-24 | United Microelectronics Corp. | Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit |
JP2000216264A (ja) * | 1999-01-22 | 2000-08-04 | Mitsubishi Electric Corp | Cmos論理回路素子、半導体装置とその製造方法およびその製造方法において用いる半導体回路設計方法 |
JP4030257B2 (ja) * | 2000-08-14 | 2008-01-09 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP3566203B2 (ja) * | 2000-12-06 | 2004-09-15 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP2002217195A (ja) * | 2001-01-17 | 2002-08-02 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
TW584899B (en) * | 2001-07-20 | 2004-04-21 | Nutool Inc | Planar metal electroprocessing |
US6989603B2 (en) * | 2001-10-02 | 2006-01-24 | Guobiao Zhang | nF-Opening Aiv Structures |
JP2003133314A (ja) * | 2001-10-30 | 2003-05-09 | Hitachi Ltd | 半導体装置の製造方法 |
JP3790469B2 (ja) * | 2001-12-21 | 2006-06-28 | 富士通株式会社 | 半導体装置 |
US7042095B2 (en) * | 2002-03-29 | 2006-05-09 | Renesas Technology Corp. | Semiconductor device including an interconnect having copper as a main component |
JP4034227B2 (ja) | 2002-05-08 | 2008-01-16 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
US7943436B2 (en) * | 2002-07-29 | 2011-05-17 | Synopsys, Inc. | Integrated circuit devices and methods and apparatuses for designing integrated circuit devices |
JP4141322B2 (ja) * | 2003-06-13 | 2008-08-27 | Necエレクトロニクス株式会社 | 半導体集積回路の自動配線方法及び半導体集積回路の設計のプログラム |
JP2005268748A (ja) * | 2004-02-18 | 2005-09-29 | Nec Electronics Corp | 半導体装置及びその製造方法 |
CN102254570B (zh) * | 2004-05-25 | 2014-09-10 | 瑞萨电子株式会社 | 半导体器件 |
JP5234886B2 (ja) * | 2004-10-25 | 2013-07-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP4803997B2 (ja) | 2004-12-03 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体集積装置、その設計方法、設計装置、およびプログラム |
JP2007035955A (ja) * | 2005-07-27 | 2007-02-08 | Toshiba Corp | 半導体装置およびその製造方法 |
US7446040B2 (en) * | 2006-01-12 | 2008-11-04 | International Business Machines Corporation | Structure for optimizing fill in semiconductor features deposited by electroplating |
US20080122089A1 (en) * | 2006-11-08 | 2008-05-29 | Toshiba America Electronic Components, Inc. | Interconnect structure with line resistance dispersion |
JP4688901B2 (ja) * | 2008-05-13 | 2011-05-25 | 三菱電機株式会社 | 半導体装置 |
JP5522622B2 (ja) * | 2009-03-18 | 2014-06-18 | ピーエスフォー ルクスコ エスエイアールエル | 半導体記憶装置及びその製造方法 |
JP5000788B2 (ja) * | 2010-08-17 | 2012-08-15 | パナソニック株式会社 | 不揮発性記憶装置およびその製造方法 |
JP5569354B2 (ja) * | 2010-11-17 | 2014-08-13 | 富士通セミコンダクター株式会社 | キャパシタおよび半導体装置 |
-
2008
- 2008-06-03 JP JP2008145372A patent/JP5350681B2/ja active Active
-
2009
- 2009-05-29 US US12/474,526 patent/US8299621B2/en not_active Expired - Fee Related
-
2012
- 2012-07-30 US US13/561,752 patent/US8426975B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US8299621B2 (en) | 2012-10-30 |
JP2009295653A (ja) | 2009-12-17 |
US20120292765A1 (en) | 2012-11-22 |
US20090294980A1 (en) | 2009-12-03 |
US8426975B2 (en) | 2013-04-23 |
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