JP5339928B2 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
JP5339928B2
JP5339928B2 JP2009006894A JP2009006894A JP5339928B2 JP 5339928 B2 JP5339928 B2 JP 5339928B2 JP 2009006894 A JP2009006894 A JP 2009006894A JP 2009006894 A JP2009006894 A JP 2009006894A JP 5339928 B2 JP5339928 B2 JP 5339928B2
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JP
Japan
Prior art keywords
layer
wiring
pad
wiring board
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2009006894A
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English (en)
Japanese (ja)
Other versions
JP2010165855A5 (enExample
JP2010165855A (ja
Inventor
章夫 堀内
俊次 宮坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2009006894A priority Critical patent/JP5339928B2/ja
Priority to US12/686,588 priority patent/US8609998B2/en
Publication of JP2010165855A publication Critical patent/JP2010165855A/ja
Publication of JP2010165855A5 publication Critical patent/JP2010165855A5/ja
Application granted granted Critical
Publication of JP5339928B2 publication Critical patent/JP5339928B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H10W70/65—
    • H10W70/685—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H10P72/7424—
    • H10W70/655—
    • H10W72/07251—
    • H10W72/20—
    • H10W74/15—
    • H10W90/701—
    • H10W90/724—
    • H10W90/734—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
JP2009006894A 2009-01-15 2009-01-15 配線基板及びその製造方法 Active JP5339928B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009006894A JP5339928B2 (ja) 2009-01-15 2009-01-15 配線基板及びその製造方法
US12/686,588 US8609998B2 (en) 2009-01-15 2010-01-13 Wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009006894A JP5339928B2 (ja) 2009-01-15 2009-01-15 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2010165855A JP2010165855A (ja) 2010-07-29
JP2010165855A5 JP2010165855A5 (enExample) 2012-02-16
JP5339928B2 true JP5339928B2 (ja) 2013-11-13

Family

ID=42318242

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009006894A Active JP5339928B2 (ja) 2009-01-15 2009-01-15 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US8609998B2 (enExample)
JP (1) JP5339928B2 (enExample)

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US8242593B2 (en) * 2008-01-27 2012-08-14 International Business Machines Corporation Clustered stacked vias for reliable electronic substrates
JP5249173B2 (ja) * 2009-10-30 2013-07-31 新光電気工業株式会社 半導体素子実装配線基板及びその製造方法
JP2011253911A (ja) * 2010-06-01 2011-12-15 Shinko Electric Ind Co Ltd 配線基板
JP5693977B2 (ja) * 2011-01-11 2015-04-01 新光電気工業株式会社 配線基板及びその製造方法
US20120286416A1 (en) * 2011-05-11 2012-11-15 Tessera Research Llc Semiconductor chip package assembly and method for making same
JP2013157585A (ja) * 2012-01-26 2013-08-15 Sanei Kagaku Kk プリント配線基板及び多層プリント配線板、並びにこれらの製造方法
CN104254917B (zh) * 2012-03-26 2019-04-09 先进封装技术私人有限公司 用于半导体封装的多层基底
US9615447B2 (en) * 2012-07-23 2017-04-04 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Multilayer electronic support structure with integral constructional elements
TWI562295B (en) 2012-07-31 2016-12-11 Mediatek Inc Semiconductor package and method for fabricating base for semiconductor package
US9177899B2 (en) 2012-07-31 2015-11-03 Mediatek Inc. Semiconductor package and method for fabricating base for semiconductor package
US10991669B2 (en) 2012-07-31 2021-04-27 Mediatek Inc. Semiconductor package using flip-chip technology
TWI543311B (zh) * 2012-07-31 2016-07-21 聯發科技股份有限公司 半導體封裝基座的製造方法
JP6107021B2 (ja) * 2012-09-21 2017-04-05 凸版印刷株式会社 配線基板の製造方法
JP6089557B2 (ja) * 2012-10-10 2017-03-08 株式会社村田製作所 電子部品モジュール
US8802504B1 (en) 2013-03-14 2014-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
US9299649B2 (en) 2013-02-08 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
CN107393899B (zh) * 2013-06-11 2020-07-24 龙南骏亚精密电路有限公司 芯片封装基板
US9355208B2 (en) * 2013-07-08 2016-05-31 Kla-Tencor Corp. Detecting defects on a wafer
KR20150049084A (ko) * 2013-10-29 2015-05-08 삼성전기주식회사 인쇄회로기판
KR101609268B1 (ko) * 2014-02-10 2016-04-20 삼성전기주식회사 임베디드 기판 및 임베디드 기판의 제조 방법
JP6133227B2 (ja) * 2014-03-27 2017-05-24 新光電気工業株式会社 配線基板及びその製造方法
KR20160010960A (ko) * 2014-07-21 2016-01-29 삼성전기주식회사 인쇄회로기판 및 그 제조방법
JP6358431B2 (ja) * 2014-08-25 2018-07-18 新光電気工業株式会社 電子部品装置及びその製造方法
TWI551207B (zh) * 2014-09-12 2016-09-21 矽品精密工業股份有限公司 基板結構及其製法
JP5873152B1 (ja) * 2014-09-29 2016-03-01 日本特殊陶業株式会社 配線基板
TWI595810B (zh) * 2015-05-22 2017-08-11 欣興電子股份有限公司 封裝結構及其製作方法
CN109196963B (zh) * 2016-06-17 2020-12-04 株式会社村田制作所 树脂多层基板的制造方法
CN213124101U (zh) 2017-11-30 2021-05-04 株式会社村田制作所 多层基板以及多层基板的安装构造
KR102055595B1 (ko) * 2017-12-15 2019-12-16 삼성전자주식회사 반도체 패키지
US11393746B2 (en) 2020-03-19 2022-07-19 Taiwan Semiconductor Manufacturing Company, Ltd. Reinforcing package using reinforcing patches
CN115226325A (zh) * 2021-04-14 2022-10-21 鹏鼎控股(深圳)股份有限公司 电路板的制作方法以及电路板
KR20250129421A (ko) * 2024-02-22 2025-08-29 엘지이노텍 주식회사 회로기판 및 반도체 패키지

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JPS6210463U (enExample) * 1985-07-02 1987-01-22
JPS6210463A (ja) 1985-07-05 1987-01-19 Mikuni Kogyo Co Ltd 混合気供給装置の燃料系
JP3126331B2 (ja) * 1997-10-29 2001-01-22 イビデン株式会社 パッケージ基板
EP1895589A3 (en) * 1997-10-17 2013-04-03 Ibiden Co., Ltd. Semiconductor package substrate
JP2000013019A (ja) * 1998-06-23 2000-01-14 Sharp Corp ビルトアップ多層プリント配線板およびその製造方法
JP3635219B2 (ja) 1999-03-11 2005-04-06 新光電気工業株式会社 半導体装置用多層基板及びその製造方法
JP2001077543A (ja) * 1999-09-03 2001-03-23 Fujitsu Ltd 多層配線基板
US20020043727A1 (en) * 2000-10-13 2002-04-18 Hsiao-Che Wu Bonding pad structure
JP2003124637A (ja) * 2001-10-11 2003-04-25 Toppan Printing Co Ltd 多層配線板
JP4051989B2 (ja) * 2002-04-12 2008-02-27 株式会社デンソー 多層配線基板の製造方法
US7049701B2 (en) * 2003-10-15 2006-05-23 Kabushiki Kaisha Toshiba Semiconductor device using insulating film of low dielectric constant as interlayer insulating film
JP2007059821A (ja) * 2005-08-26 2007-03-08 Shinko Electric Ind Co Ltd 配線基板の製造方法
JP4334005B2 (ja) 2005-12-07 2009-09-16 新光電気工業株式会社 配線基板の製造方法及び電子部品実装構造体の製造方法
TWI281737B (en) * 2005-12-13 2007-05-21 Via Tech Inc Chip package and coreless package substrate thereof
JP5032187B2 (ja) * 2007-04-17 2012-09-26 新光電気工業株式会社 配線基板の製造方法及び半導体装置の製造方法及び配線基板

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Publication number Publication date
US20100175917A1 (en) 2010-07-15
US8609998B2 (en) 2013-12-17
JP2010165855A (ja) 2010-07-29

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