JP5232013B2 - フラッシュメモリにおける誤り訂正のための方法およびシステム - Google Patents
フラッシュメモリにおける誤り訂正のための方法およびシステム Download PDFInfo
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- 230000015654 memory Effects 0.000 title claims abstract description 237
- 238000000034 method Methods 0.000 title claims description 93
- 238000012937 correction Methods 0.000 title description 13
- 239000007787 solid Substances 0.000 claims abstract description 80
- 238000003860 storage Methods 0.000 claims abstract description 26
- 238000012545 processing Methods 0.000 claims description 28
- 238000009826 distribution Methods 0.000 claims description 23
- 238000004891 communication Methods 0.000 claims description 10
- 238000005315 distribution function Methods 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 claims description 9
- 238000003491 array Methods 0.000 claims description 4
- 230000003252 repetitive effect Effects 0.000 claims description 3
- 210000004027 cell Anatomy 0.000 description 83
- 238000013500 data storage Methods 0.000 description 26
- 238000010586 diagram Methods 0.000 description 20
- 230000006870 function Effects 0.000 description 14
- 230000008569 process Effects 0.000 description 10
- 238000012986 modification Methods 0.000 description 7
- 230000004048 modification Effects 0.000 description 7
- 230000003287 optical effect Effects 0.000 description 7
- 238000004364 calculation method Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 5
- 238000013507 mapping Methods 0.000 description 4
- 238000013139 quantization Methods 0.000 description 4
- 238000000638 solvent extraction Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000007667 floating Methods 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 108010076504 Protein Sorting Signals Proteins 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000001151 other effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 210000000352 storage cell Anatomy 0.000 description 2
- 230000009897 systematic effect Effects 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000004422 calculation algorithm Methods 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
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-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/16—Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1177—Regular LDPC codes with parity-check matrices wherein all rows and columns have the same row weight and column weight, respectively
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1515—Reed-Solomon codes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/40—Specific encoding of data in memory or cache
- G06F2212/403—Error protection encoding, e.g. using parity or ECC codes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/16—Solid state audio
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
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Description
仮出願第60/760,622号(発明の名称:「フラッシュメモリ−誤り訂正−」、出願日:2006年1月20日)
仮出願第60/761,888号(発明の名称:「符号化および信号処理に基づくフラッシュメモリの記憶容量の拡大」、出願日:2006年1月25日)
仮出願第60/771,621号(発明の名称:「符号化および信号処理に基づくフラッシュメモリの記憶容量の拡大」、出願日:2006年2月8日)
なお、本出願に対応する外国の特許出願においては下記の文献が発見または提出されている。
[項目1]
第1のデジタルレベル数を用いてそれぞれデータを格納する複数のメモリセルを有する多重レベル固体不揮発性メモリアレイ用のコントローラであって、
第1のデータビット列を符号化して符号化データビット列を供給する手段と、
上記符号化データビット列を変換してデータシンボル列を得る手段と、
上記多重レベル固体不揮発性メモリアレイが有するメモリセルに上記データシンボル列を格納する手段と、
上記データシンボル列を取り出す手段と、
取り出された上記データシンボル列を復号して、上記メモリセルに上記データシンボル列を格納するのに用いられた上記第1のデジタルレベル数より多い第2のデジタルレベル数で特徴付けられる出力データシンボル列を供給する手段と、を備えるコントローラ。
[項目2]
上記第1のデータビット列を生成するべく第2のデータビット列を符号化する手段と、
上記出力データシンボル列を復号する手段と、をさらに備える、項目1に記載のコントローラ。
[項目3]
上記第1のデータビット列の符号化は第1のECC技術に従って実行され、上記第2のデータビット列の符号化は第2のECC技術に従って実行される、項目2に記載のコントローラ。
[項目4]
上記第1のECC技術と上記第2のECC技術は異なる、項目3に記載のコントローラ。
[項目5]
上記多重レベル固体不揮発性メモリアレイは1以上のフラッシュEEPROM(登録商標)アレイを含む、項目1に記載のコントローラ。
[項目6]
上記データシンボルと対応付けられたソフト情報を処理する手段、をさらに備える項目1に記載のコントローラ。
Claims (38)
- 第1のデジタルレベル数を用いてデータを格納する複数のメモリセルを有する多重レベル固体不揮発性メモリアレイと、
前記多重レベル固体不揮発性メモリアレイに格納するデータを生成する第1の符号器と、
前記多重レベル固体不揮発性メモリアレイが有する前記複数のメモリセルのそれぞれに格納されている前記データを受け取り、前記データに基づいて、前記データの格納に用いられた前記第1のデジタルレベル数よりも多い第2のデジタルレベル数で特徴付けられる、それぞれの前記データのデジタル信号を出力する、アナログ/デジタルコンバータと
を備え、
複数のデジタルレベルのうちの第1のレベルに対してプログラミングされた前記複数のメモリセルの電圧は、第1の分布の幅を有する第1の確率分布関数によって特徴づけられ、
複数のデジタルレベルのうちの第2のレベルに対してプログラミングされた前記複数のメモリセルの電圧は、第2の分布の幅を有する第2の確率分布関数によって特徴づけられ、
前記第1の分布の幅は前記第2の分布の幅よりも広く、
前記第1の符号器は、前記第2のレベルのデータの頻度に比べて、前記第1のレベルのデータの頻度を低減させる、固体不揮発性メモリユニット。 - 前記多重レベル固体不揮発性メモリアレイはフラッシュEEPROM(登録商標)アレイである
請求項1に記載の固体不揮発性メモリユニット。 - 前記固体不揮発性メモリユニットは集積回路内に配設されている
請求項1または2に記載の固体不揮発性メモリユニット。 - 前記固体不揮発性メモリアレイから取り出されたデータを復号する第1の復号器
をさらに備える請求項1から3のいずれか1項に記載の固体不揮発性メモリユニット。 - 前記第1の符号器と通信する第2の符号器と、
前記第1の復号器と通信する第2の復号器と
をさらに備える請求項4に記載の固体不揮発性メモリユニット。 - 前記第1の符号器は第1のECC技術を実行して、前記第2の符号器は第2のECC技術を実行する
請求項5に記載の固体不揮発性メモリユニット。 - 前記第1のECC技術と前記第2のECC技術は異なる
請求項6に記載の固体不揮発性メモリユニット。 - 前記第2の符号器はリードソロモン符号器を含む
請求項5に記載の固体不揮発性メモリユニット。 - 前記第1の符号器により供給された符号化データを変調する変調器と、
前記固体不揮発性メモリアレイから取り出された、変調された前記データを復調する復調器と
をさらに備える、請求項1から8のいずれか1項に記載の固体不揮発性メモリユニット。 - 前記第1の符号器および前記変調器はどちらも、トレリス符号化変調器を含む
請求項9に記載の固体不揮発性メモリユニット。 - 前記第1の符号器は2進符号器である
請求項1から10のいずれか1項に記載の固体不揮発性メモリユニット。 - 前記第1の符号器は畳み込み符号器である
請求項1から10のいずれか1項に記載の固体不揮発性メモリユニット。 - 前記第1の符号器は反復符号器である
請求項1から10のいずれか1項に記載の固体不揮発性メモリユニット。 - 第1のデータを含むデータストリームを生成する段階と、
多重レベル固体不揮発性メモリアレイが有するメモリセルに、第1のデジタルレベル数を用いて前記第1のデータを含む前記データストリームを格納する段階と、
前記メモリアレイが有する前記メモリセルから格納されている前記第1のデータを含む前記データストリームを取り出す段階と、
前記取り出したデータストリームに含まれるデータを、前記第1のデジタルレベル数よりも多い第2のデジタルレベル数にデジタル化する段階と
を備え、
複数のデジタルレベルのうちの第1のレベルに対してプログラミングされた前記多重レベル固体不揮発性メモリアレイが有する複数のメモリセルの電圧は、第1の分布の幅を有する第1の確率分布関数によって特徴付けられ、
複数のデジタルレベルのうちの第2のレベルに対してプログラミングされた前記複数のメモリセルの電圧は、第2の分布の幅を有する第2の確率分布関数によって特徴付けられ、
前記第1の分布の幅は前記第2の分布の幅よりも広く、
前記データストリームを生成することは、前記データストリームの第2のレベルのデータの頻度に比べて前記データストリームの第1のレベルのデータの頻度を低減させる、固体不揮発性メモリユニットを操作する方法。 - 前記多重レベル固体不揮発性メモリアレイはフラッシュEEPROM(登録商標)アレイである
請求項14に記載の方法。 - 前記固体不揮発性メモリユニットは集積回路内に配設されている
請求項14または15に記載の方法。 - 前記取り出したデータストリームに含まれるデータを復号する段階
をさらに備え、
前記データストリームを生成する段階は、第2のデータストリームを符号化する段階を含む、
請求項14に記載の方法。 - 前記第2のデータストリームを生成するべく第3のデータを符号化する段階と、
前記第2のデータストリームを再生成するべく、復号された前記取り出されたデータを復号する段階と
をさらに備える請求項17に記載の方法。 - 前記第2のデータストリームの符号化は第1のECC技術に従って実行され、前記第3のデータの符号化は第2のECC技術に従って実行される
請求項18に記載の方法。 - 前記第1のECC技術と前記第2のECC技術は異なる
請求項19に記載の方法。 - 前記第3のデータを符号化する段階は、リードソロモン符号化技術を実行する段階を含む
請求項18に記載の方法。 - 符号化された前記第1のデータを変調する段階と、
前記多重レベル固体不揮発性メモリアレイに変調された前記データストリームを格納する段階と、
前記多重レベル固体不揮発性メモリアレイから、変調された前記データストリームを取り出す段階と、
前記多重レベル固体不揮発性メモリアレイから取り出された前記データストリームを復調する段階と
をさらに備える請求項17に記載の方法。 - 前記符号化および前記変調はどちらも、トレリス符号化変調の実行を含む
請求項22に記載の方法。 - 前記第2のデータストリームの符号化は、2進符号化技術に従って実行される
請求項17に記載の方法。 - 前記第2のデータストリームの符号化は、畳み込み符号化技術に従って実行される
請求項17に記載の方法。 - 前記第2のデータストリームの符号化は、反復符号化技術に従って実行される
請求項17に記載の方法。 - 第1のデジタルレベル数を用いてそれぞれデータを格納する複数のメモリセルを有する多重レベル固体不揮発性メモリアレイ用のコントローラであって、
データビット列を受け取り、符号化データビット列を供給する第1の符号器と、
前記符号化データビット列を、前記多重レベル固体不揮発性メモリアレイが有するメモリセルでの格納用のデータシンボル列へと変換するマッパと、
前記多重レベル固体不揮発性メモリアレイが有するメモリセルに格納されているデータシンボル列に基づく電圧信号列を受け取り、前記メモリセルに前記データシンボル列を格納するのに用いられた前記第1のデジタルレベル数より多い第2のデジタルレベル数で特徴付けられる出力データシンボル列を生成する第1の復号器と
を備え、
複数のデジタルレベルのうちの第1のレベルに対してプログラミングされた前記多重レベル固体不揮発性メモリアレイが有する複数のメモリセルの電圧は、第1の分布の幅を有する第1の確率分布関数によって特徴付けられ、
複数のデジタルレベルのうちの第2のレベルに対してプログラミングされた前記複数のメモリセルの電圧は、第2の分布の幅を有する第2の確率分布関数によって特徴付けられ、
前記第1の分布の幅は前記第2の分布の幅よりも大きく、
前記第1の符号器は、前記符号化データビット列の第2のレベルのデータの頻度に比べて前記符号化データビット列の第1のレベルのデータの頻度を低減させながら、前記符号化データビット列を生成する、コントローラ。 - 前記第1の符号器と通信する第2の符号器と、
前記第1の復号器と通信する第2の復号器と
をさらに備える請求項27に記載のコントローラ。 - 前記第1の符号器は第1のECC技術を実行して、前記第2の符号器は第2のECC技術を実行する
請求項28に記載のコントローラ。 - 前記第1のECC技術と前記第2のECC技術は異なる
請求項29に記載のコントローラ。 - 前記多重レベル固体不揮発性メモリアレイは1以上のフラッシュEEPROM(登録商標)アレイを含む
請求項27から30のいずれか1項に記載のコントローラ。 - 前記第1の復号器はソフト情報復号器を含む
請求項27から31のいずれか1項に記載のコントローラ。 - 第1のデジタルレベル数を用いてそれぞれデータを格納する複数のメモリセルを有する多重レベル固体不揮発性メモリアレイ用のコントローラを操作する方法であって、
符号化データビット列を供給するべく第1のデータビット列を符号化する段階と、
データシンボル列を得るべく前記符号化データビット列を変換する段階と、
前記多重レベル固体不揮発性メモリアレイが有するメモリセルに前記データシンボル列を格納する段階と、
前記データシンボル列を取り出す段階と、
取り出された前記データシンボル列を復号して、前記メモリセルに前記データシンボル列を格納するのに用いられた前記第1のデジタルレベル数より多い第2のデジタルレベル数で特徴付けられる出力データシンボル列を供給する段階と
を備え、
複数のデジタルレベルのうちの第1のレベルに対してプログラミングされた前記多重レベル固体不揮発性メモリアレイが有する複数のメモリセルの電圧は、第1の分布の幅を有する第1の確率分布関数によって特徴付けられ、
複数のデジタルレベルのうちの第2のレベルに対してプログラミングされた前記複数のメモリセルの電圧は、第2の分布の幅を有する第2の確率分布関数によって特徴付けられ、
前記第1の分布の幅は前記第2の分布の幅よりも広く、
前記第1のデータビット列を符号化する段階は、前記符号化データビット列の第2のレベルのデータの頻度に比べて前記符号化データビット列の第1のレベルのデータの頻度を低減する段階を含む、方法。 - 前記第1のデータビット列を生成するべく第2のデータビット列を符号化する段階と、
前記出力データシンボル列を復号する段階と
をさらに備える請求項33に記載の方法。 - 前記第1のデータビット列の符号化は第1のECC技術に従って実行され、前記第2のデータビット列の符号化は第2のECC技術に従って実行される
請求項34に記載の方法。 - 前記第1のECC技術と前記第2のECC技術は異なる
請求項35に記載の方法。 - 前記多重レベル固体不揮発性メモリアレイは1以上のフラッシュEEPROM(登録商標)アレイを含む
請求項33から36のいずれか1項に記載の方法。 - 前記データシンボルと関連付けられたソフト情報を処理する段階と
をさらに備える請求項33から37のいずれか1項に記載の方法。
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US60/771,621 | 2006-02-08 | ||
PCT/US2007/001620 WO2007084749A2 (en) | 2006-01-20 | 2007-01-19 | Method and system for error correction in flash memory |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014517976A (ja) * | 2011-05-12 | 2014-07-24 | マイクロン テクノロジー, インク. | メモリセルをプログラミングすること |
Families Citing this family (261)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8055979B2 (en) * | 2006-01-20 | 2011-11-08 | Marvell World Trade Ltd. | Flash memory with coding and signal processing |
US8848442B2 (en) * | 2006-03-06 | 2014-09-30 | Sandisk Il Ltd. | Multi-bit-per-cell flash memory device with non-bijective mapping |
US7388781B2 (en) * | 2006-03-06 | 2008-06-17 | Sandisk Il Ltd. | Multi-bit-per-cell flash memory device with non-bijective mapping |
US8645793B2 (en) | 2008-06-03 | 2014-02-04 | Marvell International Ltd. | Statistical tracking for flash memory |
CN103258572B (zh) | 2006-05-12 | 2016-12-07 | 苹果公司 | 存储设备中的失真估计和消除 |
WO2007132456A2 (en) * | 2006-05-12 | 2007-11-22 | Anobit Technologies Ltd. | Memory device with adaptive capacity |
US7840875B2 (en) * | 2006-05-15 | 2010-11-23 | Sandisk Corporation | Convolutional coding methods for nonvolatile memory |
US20070266296A1 (en) * | 2006-05-15 | 2007-11-15 | Conley Kevin M | Nonvolatile Memory with Convolutional Coding |
US7805663B2 (en) * | 2006-09-28 | 2010-09-28 | Sandisk Corporation | Methods of adapting operation of nonvolatile memory |
US7818653B2 (en) | 2006-09-28 | 2010-10-19 | Sandisk Corporation | Methods of soft-input soft-output decoding for nonvolatile memory |
US7904783B2 (en) * | 2006-09-28 | 2011-03-08 | Sandisk Corporation | Soft-input soft-output decoder for nonvolatile memory |
US7904780B2 (en) * | 2006-11-03 | 2011-03-08 | Sandisk Corporation | Methods of modulating error correction coding |
US8001441B2 (en) * | 2006-11-03 | 2011-08-16 | Sandisk Technologies Inc. | Nonvolatile memory with modulated error correction coding |
US7827450B1 (en) | 2006-11-28 | 2010-11-02 | Marvell International Ltd. | Defect detection and handling for memory based on pilot cells |
US8316206B2 (en) | 2007-02-12 | 2012-11-20 | Marvell World Trade Ltd. | Pilot placement for non-volatile memory |
US8595573B2 (en) | 2006-12-03 | 2013-11-26 | Apple Inc. | Automatic defect management in memory devices |
KR100785925B1 (ko) * | 2006-12-06 | 2007-12-17 | 삼성전자주식회사 | Tcm을 이용한 멀티 레벨 셀 메모리 장치 |
KR100822030B1 (ko) * | 2006-12-26 | 2008-04-15 | 삼성전자주식회사 | 고 부호화율 부호를 이용한 멀티 레벨 셀 메모리 장치 |
US8583981B2 (en) * | 2006-12-29 | 2013-11-12 | Marvell World Trade Ltd. | Concatenated codes for holographic storage |
WO2008111058A2 (en) | 2007-03-12 | 2008-09-18 | Anobit Technologies Ltd. | Adaptive estimation of memory cell read thresholds |
US7904793B2 (en) * | 2007-03-29 | 2011-03-08 | Sandisk Corporation | Method for decoding data in non-volatile storage using reliability metrics based on multiple reads |
US7958427B1 (en) * | 2007-03-30 | 2011-06-07 | Link—A—Media Devices Corporation | ECC with out of order completion |
US8281212B1 (en) * | 2007-03-30 | 2012-10-02 | Link—A—Media Devices Corporation | Iterative ECC decoder with out of order completion |
US7966546B2 (en) * | 2007-03-31 | 2011-06-21 | Sandisk Technologies Inc. | Non-volatile memory with soft bit data transmission for error correction control |
US7966550B2 (en) * | 2007-03-31 | 2011-06-21 | Sandisk Technologies Inc. | Soft bit data transmission for error correction control in non-volatile memory |
US7975209B2 (en) * | 2007-03-31 | 2011-07-05 | Sandisk Technologies Inc. | Non-volatile memory with guided simulated annealing error correction control |
US7971127B2 (en) * | 2007-03-31 | 2011-06-28 | Sandisk Technologies Inc. | Guided simulated annealing in non-volatile memory error correction control |
US7808834B1 (en) | 2007-04-13 | 2010-10-05 | Marvell International Ltd. | Incremental memory refresh |
US8429493B2 (en) | 2007-05-12 | 2013-04-23 | Apple Inc. | Memory device with internal signap processing unit |
US8234545B2 (en) | 2007-05-12 | 2012-07-31 | Apple Inc. | Data storage with incremental redundancy |
US8117520B2 (en) * | 2007-06-15 | 2012-02-14 | Micron Technology, Inc. | Error detection for multi-bit memory |
US8065583B2 (en) | 2007-07-06 | 2011-11-22 | Micron Technology, Inc. | Data storage with an outer block code and a stream-based inner code |
US8051358B2 (en) | 2007-07-06 | 2011-11-01 | Micron Technology, Inc. | Error recovery storage along a nand-flash string |
KR101480383B1 (ko) * | 2007-07-25 | 2015-01-09 | 삼성전자주식회사 | 코드 인코딩 장치 |
US8259497B2 (en) | 2007-08-06 | 2012-09-04 | Apple Inc. | Programming schemes for multi-level analog memory cells |
US8386879B2 (en) * | 2007-08-23 | 2013-02-26 | Nec Laboratories America, Inc. | GLDPC encoding with Reed-Muller component codes for optical communications |
US8031526B1 (en) | 2007-08-23 | 2011-10-04 | Marvell International Ltd. | Write pre-compensation for nonvolatile memory |
US8189381B1 (en) | 2007-08-28 | 2012-05-29 | Marvell International Ltd. | System and method for reading flash memory cells |
US8085605B2 (en) * | 2007-08-29 | 2011-12-27 | Marvell World Trade Ltd. | Sequence detection for flash memory with inter-cell interference |
US8174905B2 (en) | 2007-09-19 | 2012-05-08 | Anobit Technologies Ltd. | Programming orders for reducing distortion in arrays of multi-level analog memory cells |
US8300478B2 (en) | 2007-09-19 | 2012-10-30 | Apple Inc. | Reducing distortion using joint storage |
US8365040B2 (en) | 2007-09-20 | 2013-01-29 | Densbits Technologies Ltd. | Systems and methods for handling immediate data errors in flash memory |
US8650352B2 (en) | 2007-09-20 | 2014-02-11 | Densbits Technologies Ltd. | Systems and methods for determining logical values of coupled flash memory cells |
US8527819B2 (en) | 2007-10-19 | 2013-09-03 | Apple Inc. | Data storage in analog memory cell arrays having erase failures |
US8694715B2 (en) | 2007-10-22 | 2014-04-08 | Densbits Technologies Ltd. | Methods for adaptively programming flash memory devices and flash memory systems incorporating same |
US8443242B2 (en) * | 2007-10-25 | 2013-05-14 | Densbits Technologies Ltd. | Systems and methods for multiple coding rates in flash devices |
US8270246B2 (en) | 2007-11-13 | 2012-09-18 | Apple Inc. | Optimized selection of memory chips in multi-chips memory devices |
US8046542B2 (en) | 2007-11-21 | 2011-10-25 | Micron Technology, Inc. | Fault-tolerant non-volatile integrated circuit memory |
US8327245B2 (en) | 2007-11-21 | 2012-12-04 | Micron Technology, Inc. | Memory controller supporting rate-compatible punctured codes |
US8499229B2 (en) * | 2007-11-21 | 2013-07-30 | Micro Technology, Inc. | Method and apparatus for reading data from flash memory |
US8225181B2 (en) * | 2007-11-30 | 2012-07-17 | Apple Inc. | Efficient re-read operations from memory devices |
WO2009072105A2 (en) | 2007-12-05 | 2009-06-11 | Densbits Technologies Ltd. | A low power chien-search based bch/rs decoding system for flash memory, mobile communications devices and other applications |
WO2009072100A2 (en) | 2007-12-05 | 2009-06-11 | Densbits Technologies Ltd. | Systems and methods for temporarily retiring memory portions |
WO2009072103A2 (en) * | 2007-12-05 | 2009-06-11 | Densbits Technologies Ltd. | Flash memory apparatus and methods using a plurality of decoding stages including optional use of concatenated bch codes and/or designation of 'first below' cells |
US8209588B2 (en) * | 2007-12-12 | 2012-06-26 | Anobit Technologies Ltd. | Efficient interference cancellation in analog memory cell arrays |
WO2009074979A2 (en) | 2007-12-12 | 2009-06-18 | Densbits Technologies Ltd. | Chien-search system employing a clock-gating scheme to save power for error correction decoder and other applications |
WO2009074978A2 (en) * | 2007-12-12 | 2009-06-18 | Densbits Technologies Ltd. | Systems and methods for error correction and decoding on multi-level physical media |
US8456905B2 (en) | 2007-12-16 | 2013-06-04 | Apple Inc. | Efficient data storage in multi-plane memory devices |
WO2009078006A2 (en) | 2007-12-18 | 2009-06-25 | Densbits Technologies Ltd. | Apparatus for coding at a plurality of rates in multi-level flash memory systems, and methods useful in conjunction therewith |
US8230300B2 (en) | 2008-03-07 | 2012-07-24 | Apple Inc. | Efficient readout from analog memory cells using data compression |
US8179719B1 (en) | 2008-03-10 | 2012-05-15 | Marvell International Ltd. | Systems and methods for improving error distributions in multi-level cell memory systems |
KR20090097673A (ko) * | 2008-03-12 | 2009-09-16 | 삼성전자주식회사 | 연판정 값에 기반하여 메모리에 저장된 데이터를 검출하는장치 |
US8493783B2 (en) | 2008-03-18 | 2013-07-23 | Apple Inc. | Memory device readout using multiple sense times |
US8400858B2 (en) | 2008-03-18 | 2013-03-19 | Apple Inc. | Memory device with reduced sense time readout |
US8972472B2 (en) | 2008-03-25 | 2015-03-03 | Densbits Technologies Ltd. | Apparatus and methods for hardware-efficient unbiased rounding |
US8533563B2 (en) * | 2008-03-31 | 2013-09-10 | Qimonda Ag | Memory read-out |
US8086940B2 (en) * | 2008-04-28 | 2011-12-27 | Newport Media, Inc. | Iterative decoding between turbo and RS decoders for improving bit error rate and packet error rate |
US8090999B2 (en) * | 2008-06-10 | 2012-01-03 | Micron Technology, Inc. | Memory media characterization for development of signal processors |
US7995388B1 (en) | 2008-08-05 | 2011-08-09 | Anobit Technologies Ltd. | Data storage using modified voltages |
US8332725B2 (en) | 2008-08-20 | 2012-12-11 | Densbits Technologies Ltd. | Reprogramming non volatile memory portions |
US8949684B1 (en) | 2008-09-02 | 2015-02-03 | Apple Inc. | Segmented data storage |
US8482978B1 (en) | 2008-09-14 | 2013-07-09 | Apple Inc. | Estimation of memory cell read thresholds by sampling inside programming level distribution intervals |
TW201019327A (en) * | 2008-09-30 | 2010-05-16 | Lsi Corp | Methods and apparatus for soft data generation for memory devices using reference cells |
US8239734B1 (en) * | 2008-10-15 | 2012-08-07 | Apple Inc. | Efficient data storage in storage device arrays |
US8321772B1 (en) | 2008-10-20 | 2012-11-27 | Link—A—Media Devices Corporation | SOVA sharing during LDPC global iteration |
US8713330B1 (en) | 2008-10-30 | 2014-04-29 | Apple Inc. | Data scrambling in memory devices |
US8208304B2 (en) | 2008-11-16 | 2012-06-26 | Anobit Technologies Ltd. | Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N |
US8291297B2 (en) * | 2008-12-18 | 2012-10-16 | Intel Corporation | Data error recovery in non-volatile memory |
US9449719B2 (en) * | 2008-12-19 | 2016-09-20 | Seagate Technology Llc | Solid-state storage device including a high resolution analog-to-digital converter |
US8248831B2 (en) | 2008-12-31 | 2012-08-21 | Apple Inc. | Rejuvenation of analog memory cells |
US8174857B1 (en) | 2008-12-31 | 2012-05-08 | Anobit Technologies Ltd. | Efficient readout schemes for analog memory cell devices using multiple read threshold sets |
US8924661B1 (en) | 2009-01-18 | 2014-12-30 | Apple Inc. | Memory system including a controller and processors associated with memory devices |
KR101519626B1 (ko) * | 2009-02-27 | 2015-05-14 | 삼성전자주식회사 | 반도체 메모리 장치 및 그것의 데이터 처리 방법 |
US8228701B2 (en) * | 2009-03-01 | 2012-07-24 | Apple Inc. | Selective activation of programming schemes in analog memory cell arrays |
US8832354B2 (en) | 2009-03-25 | 2014-09-09 | Apple Inc. | Use of host system resources by memory controller |
US8259506B1 (en) | 2009-03-25 | 2012-09-04 | Apple Inc. | Database of memory read thresholds |
US20100251076A1 (en) * | 2009-03-27 | 2010-09-30 | Chao-Yi Wu | Storage controller having soft decoder included therein, related storage control method thereof and system using the same |
US8458574B2 (en) | 2009-04-06 | 2013-06-04 | Densbits Technologies Ltd. | Compact chien-search based decoding apparatus and method |
US8819385B2 (en) | 2009-04-06 | 2014-08-26 | Densbits Technologies Ltd. | Device and method for managing a flash memory |
US8238157B1 (en) | 2009-04-12 | 2012-08-07 | Apple Inc. | Selective re-programming of analog memory cells |
US8370709B2 (en) * | 2009-04-16 | 2013-02-05 | Micron Technology, Inc. | Multiple-level memory cells and error detection |
US8560918B1 (en) | 2009-04-21 | 2013-10-15 | Marvell International Ltd. | Method and apparatus for dynamically selecting an error correction code to be applied to data in a communication system |
US8566510B2 (en) | 2009-05-12 | 2013-10-22 | Densbits Technologies Ltd. | Systems and method for flash memory management |
US8370702B2 (en) | 2009-06-10 | 2013-02-05 | Micron Technology, Inc. | Error correcting codes for increased storage capacity in multilevel memory devices |
US8479080B1 (en) | 2009-07-12 | 2013-07-02 | Apple Inc. | Adaptive over-provisioning in memory systems |
EP2299362A3 (en) * | 2009-08-18 | 2011-05-04 | ViaSat, Inc. | Forward error correction for memories |
US8305812B2 (en) | 2009-08-26 | 2012-11-06 | Densbits Technologies Ltd. | Flash memory module and method for programming a page of flash memory cells |
US8995197B1 (en) | 2009-08-26 | 2015-03-31 | Densbits Technologies Ltd. | System and methods for dynamic erase and program control for flash memory device memories |
US8868821B2 (en) | 2009-08-26 | 2014-10-21 | Densbits Technologies Ltd. | Systems and methods for pre-equalization and code design for a flash memory |
US9330767B1 (en) | 2009-08-26 | 2016-05-03 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Flash memory module and method for programming a page of flash memory cells |
US8495465B1 (en) | 2009-10-15 | 2013-07-23 | Apple Inc. | Error correction coding over multiple memory pages |
US8730729B2 (en) | 2009-10-15 | 2014-05-20 | Densbits Technologies Ltd. | Systems and methods for averaging error rates in non-volatile devices and storage systems |
US8724387B2 (en) | 2009-10-22 | 2014-05-13 | Densbits Technologies Ltd. | Method, system, and computer readable medium for reading and programming flash memory cells using multiple bias voltages |
US8626988B2 (en) | 2009-11-19 | 2014-01-07 | Densbits Technologies Ltd. | System and method for uncoded bit error rate equalization via interleaving |
US8677054B1 (en) | 2009-12-16 | 2014-03-18 | Apple Inc. | Memory management schemes for non-volatile memory devices |
US9037777B2 (en) | 2009-12-22 | 2015-05-19 | Densbits Technologies Ltd. | Device, system, and method for reducing program/read disturb in flash arrays |
US8607124B2 (en) | 2009-12-24 | 2013-12-10 | Densbits Technologies Ltd. | System and method for setting a flash memory cell read threshold |
WO2011080784A1 (en) * | 2009-12-31 | 2011-07-07 | Ferdinando Bedeschi | Methods for a phase-change memory array |
US8694814B1 (en) | 2010-01-10 | 2014-04-08 | Apple Inc. | Reuse of host hibernation storage space by memory controller |
US8677203B1 (en) | 2010-01-11 | 2014-03-18 | Apple Inc. | Redundant data storage schemes for multi-die memory systems |
KR101678404B1 (ko) * | 2010-02-25 | 2016-11-23 | 삼성전자주식회사 | 사전 확률 정보를 사용하는 메모리 시스템 및 그것의 데이터 처리 방법 |
US8700970B2 (en) | 2010-02-28 | 2014-04-15 | Densbits Technologies Ltd. | System and method for multi-dimensional decoding |
US8527840B2 (en) | 2010-04-06 | 2013-09-03 | Densbits Technologies Ltd. | System and method for restoring damaged data programmed on a flash device |
US8516274B2 (en) | 2010-04-06 | 2013-08-20 | Densbits Technologies Ltd. | Method, system and medium for analog encryption in a flash memory |
US8745317B2 (en) | 2010-04-07 | 2014-06-03 | Densbits Technologies Ltd. | System and method for storing information in a multi-level cell memory |
US9021177B2 (en) | 2010-04-29 | 2015-04-28 | Densbits Technologies Ltd. | System and method for allocating and using spare blocks in a flash memory |
US8694853B1 (en) | 2010-05-04 | 2014-04-08 | Apple Inc. | Read commands for reading interfering memory cells |
US8386895B2 (en) * | 2010-05-19 | 2013-02-26 | Micron Technology, Inc. | Enhanced multilevel memory |
US8656263B2 (en) * | 2010-05-28 | 2014-02-18 | Stec, Inc. | Trellis-coded modulation in a multi-level cell flash memory device |
US8489979B2 (en) * | 2010-05-28 | 2013-07-16 | Seagate Technology Llc | Methods and devices to reduce outer code failure rate variability |
US8572457B2 (en) * | 2010-05-28 | 2013-10-29 | Seagate Technology Llc | Outer code protection for solid state memory devices |
US8615703B2 (en) * | 2010-06-04 | 2013-12-24 | Micron Technology, Inc. | Advanced bitwise operations and apparatus in a multi-level system with nonvolatile memory |
US11336303B2 (en) | 2010-06-04 | 2022-05-17 | Micron Technology, Inc. | Advanced bitwise operations and apparatus in a multi-level system with nonvolatile memory |
US8572423B1 (en) | 2010-06-22 | 2013-10-29 | Apple Inc. | Reducing peak current in memory systems |
US8539311B2 (en) | 2010-07-01 | 2013-09-17 | Densbits Technologies Ltd. | System and method for data recovery in multi-level cell memories |
US8621321B2 (en) | 2010-07-01 | 2013-12-31 | Densbits Technologies Ltd. | System and method for multi-dimensional encoding and decoding |
US8467249B2 (en) | 2010-07-06 | 2013-06-18 | Densbits Technologies Ltd. | Systems and methods for storing, retrieving, and adjusting read thresholds in flash memory storage system |
US8595591B1 (en) | 2010-07-11 | 2013-11-26 | Apple Inc. | Interference-aware assignment of programming levels in analog memory cells |
US9104580B1 (en) | 2010-07-27 | 2015-08-11 | Apple Inc. | Cache memory for hybrid disk drives |
US8645794B1 (en) | 2010-07-31 | 2014-02-04 | Apple Inc. | Data storage in analog memory cells using a non-integer number of bits per cell |
US8856475B1 (en) | 2010-08-01 | 2014-10-07 | Apple Inc. | Efficient selection of memory blocks for compaction |
US8493781B1 (en) | 2010-08-12 | 2013-07-23 | Apple Inc. | Interference mitigation using individual word line erasure operations |
US9070427B2 (en) | 2010-08-13 | 2015-06-30 | Sandisk Technologies Inc. | Data coding using divisions of memory cell states |
US8694854B1 (en) | 2010-08-17 | 2014-04-08 | Apple Inc. | Read threshold setting based on soft readout statistics |
US8595585B2 (en) * | 2010-08-20 | 2013-11-26 | Nec Laboratories America, Inc. | Reverse concatenated encoding and decoding |
US8964464B2 (en) | 2010-08-24 | 2015-02-24 | Densbits Technologies Ltd. | System and method for accelerated sampling |
US9116826B2 (en) * | 2010-09-10 | 2015-08-25 | Trellis Phase Communications, Lp | Encoding and decoding using constrained interleaving |
US8508995B2 (en) | 2010-09-15 | 2013-08-13 | Densbits Technologies Ltd. | System and method for adjusting read voltage thresholds in memories |
US9021181B1 (en) | 2010-09-27 | 2015-04-28 | Apple Inc. | Memory management for unifying memory cell conditions by using maximum time intervals |
US8892809B2 (en) | 2010-10-25 | 2014-11-18 | Marvell World Trade Ltd. | Data compression and encoding in a memory system |
US9063878B2 (en) | 2010-11-03 | 2015-06-23 | Densbits Technologies Ltd. | Method, system and computer readable medium for copy back |
KR101250672B1 (ko) * | 2010-12-03 | 2013-04-09 | 한국과학기술원 | 플래시 메모리 장치의 셀 간 간섭을 최소화하기 위한 격자 부호 변조 방법, 이를 이용하는 격자 부호 변조 회로, 오류 정정 회로 및 플래시 메모리 장치의 데이터 입력 방법과 플래시 메모리 장치 |
US8850100B2 (en) | 2010-12-07 | 2014-09-30 | Densbits Technologies Ltd. | Interleaving codeword portions between multiple planes and/or dies of a flash memory device |
KR20120082230A (ko) * | 2011-01-13 | 2012-07-23 | 에스케이하이닉스 주식회사 | 랜덤 코드 발생회로를 포함하는 반도체 장치 및 반도체 시스템과, 데이터 프로그래밍 방법 |
US10079068B2 (en) | 2011-02-23 | 2018-09-18 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Devices and method for wear estimation based memory management |
US8693258B2 (en) | 2011-03-17 | 2014-04-08 | Densbits Technologies Ltd. | Obtaining soft information using a hard interface |
US8621330B2 (en) | 2011-03-21 | 2013-12-31 | Microsoft Corporation | High rate locally decodable codes |
US8990665B1 (en) | 2011-04-06 | 2015-03-24 | Densbits Technologies Ltd. | System, method and computer program product for joint search of a read threshold and soft decoding |
US9501392B1 (en) | 2011-05-12 | 2016-11-22 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Management of a non-volatile memory module |
US9195592B1 (en) | 2011-05-12 | 2015-11-24 | Densbits Technologies Ltd. | Advanced management of a non-volatile memory |
US9396106B2 (en) | 2011-05-12 | 2016-07-19 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Advanced management of a non-volatile memory |
US9110785B1 (en) | 2011-05-12 | 2015-08-18 | Densbits Technologies Ltd. | Ordered merge of data sectors that belong to memory space portions |
US9372792B1 (en) | 2011-05-12 | 2016-06-21 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Advanced management of a non-volatile memory |
US8996790B1 (en) | 2011-05-12 | 2015-03-31 | Densbits Technologies Ltd. | System and method for flash memory management |
US8667211B2 (en) | 2011-06-01 | 2014-03-04 | Densbits Technologies Ltd. | System and method for managing a non-volatile memory |
US9130596B2 (en) * | 2011-06-29 | 2015-09-08 | Seagate Technology Llc | Multiuse data channel |
US8588003B1 (en) | 2011-08-01 | 2013-11-19 | Densbits Technologies Ltd. | System, method and computer program product for programming and for recovering from a power failure |
US8553468B2 (en) | 2011-09-21 | 2013-10-08 | Densbits Technologies Ltd. | System and method for managing erase operations in a non-volatile memory |
US8456919B1 (en) * | 2011-11-10 | 2013-06-04 | Sandisk Technologies Inc. | Method and apparatus to provide data including hard bit data and soft bit data to a rank modulation decoder |
US8947941B2 (en) | 2012-02-09 | 2015-02-03 | Densbits Technologies Ltd. | State responsive operations relating to flash memory cells |
US8996788B2 (en) | 2012-02-09 | 2015-03-31 | Densbits Technologies Ltd. | Configurable flash interface |
US9026887B2 (en) | 2012-03-15 | 2015-05-05 | Micron Technology, Inc. | Physical page, logical page, and codeword correspondence |
US8996793B1 (en) | 2012-04-24 | 2015-03-31 | Densbits Technologies Ltd. | System, method and computer readable medium for generating soft information |
US8788910B1 (en) | 2012-05-22 | 2014-07-22 | Pmc-Sierra, Inc. | Systems and methods for low latency, high reliability error correction in a flash drive |
US9021336B1 (en) | 2012-05-22 | 2015-04-28 | Pmc-Sierra, Inc. | Systems and methods for redundantly storing error correction codes in a flash drive with secondary parity information spread out across each page of a group of pages |
US8996957B1 (en) | 2012-05-22 | 2015-03-31 | Pmc-Sierra, Inc. | Systems and methods for initializing regions of a flash drive having diverse error correction coding (ECC) schemes |
US9047214B1 (en) | 2012-05-22 | 2015-06-02 | Pmc-Sierra, Inc. | System and method for tolerating a failed page in a flash device |
US8793556B1 (en) | 2012-05-22 | 2014-07-29 | Pmc-Sierra, Inc. | Systems and methods for reclaiming flash blocks of a flash drive |
US9135106B2 (en) * | 2012-05-22 | 2015-09-15 | Hgst Technologies Santa Ana, Inc. | Read level adjustment using soft information |
US9021333B1 (en) | 2012-05-22 | 2015-04-28 | Pmc-Sierra, Inc. | Systems and methods for recovering data from failed portions of a flash drive |
US8972824B1 (en) | 2012-05-22 | 2015-03-03 | Pmc-Sierra, Inc. | Systems and methods for transparently varying error correction code strength in a flash drive |
KR101991911B1 (ko) * | 2012-05-22 | 2019-06-24 | 삼성전자주식회사 | 비트 상태 맵핑 동작을 수행하는 코드 변조 인코더와 코드 변조 디코더를 포함하는 메모리 컨트롤러, 그것을 포함하는 데이터 저장 장치 및 플래시 메모리 시스템 |
US9021337B1 (en) | 2012-05-22 | 2015-04-28 | Pmc-Sierra, Inc. | Systems and methods for adaptively selecting among different error correction coding schemes in a flash drive |
US9176812B1 (en) | 2012-05-22 | 2015-11-03 | Pmc-Sierra, Inc. | Systems and methods for storing data in page stripes of a flash drive |
US9183085B1 (en) | 2012-05-22 | 2015-11-10 | Pmc-Sierra, Inc. | Systems and methods for adaptively selecting from among a plurality of error correction coding schemes in a flash drive for robustness and low latency |
US8838937B1 (en) | 2012-05-23 | 2014-09-16 | Densbits Technologies Ltd. | Methods, systems and computer readable medium for writing and reading data |
US8879325B1 (en) | 2012-05-30 | 2014-11-04 | Densbits Technologies Ltd. | System, method and computer program product for processing read threshold information and for reading a flash memory module |
US9042492B2 (en) * | 2012-06-27 | 2015-05-26 | Broadcom Corporation | Staggered transmission and reception for reducing latency and memory |
US9921954B1 (en) | 2012-08-27 | 2018-03-20 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Method and system for split flash memory management between host and storage controller |
US9577673B2 (en) | 2012-11-08 | 2017-02-21 | Micron Technology, Inc. | Error correction methods and apparatuses using first and second decoders |
US9368225B1 (en) | 2012-11-21 | 2016-06-14 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Determining read thresholds based upon read error direction statistics |
US10085017B2 (en) * | 2012-11-29 | 2018-09-25 | Advanced Micro Devices, Inc. | Bandwidth saving architecture for scalable video coding spatial mode |
KR101545512B1 (ko) * | 2012-12-26 | 2015-08-24 | 성균관대학교산학협력단 | 반도체 메모리 장치, 검증 독출 방법 및 시스템 |
US9069659B1 (en) | 2013-01-03 | 2015-06-30 | Densbits Technologies Ltd. | Read threshold determination using reference read threshold |
US8995302B1 (en) | 2013-01-16 | 2015-03-31 | Pmc-Sierra Us, Inc. | Method and apparatus for translated routing in an interconnect switch |
US9092353B1 (en) * | 2013-01-29 | 2015-07-28 | Pmc-Sierra Us, Inc. | Apparatus and method based on LDPC codes for adjusting a correctable raw bit error rate limit in a memory system |
WO2014127169A1 (en) * | 2013-02-15 | 2014-08-21 | Cortina Systems, Inc. | Apparatus and method for communicating data over a communication channel |
US8990661B1 (en) | 2013-03-05 | 2015-03-24 | Pmc-Sierra Us, Inc. | Layer specific attenuation factor LDPC decoder |
US9813080B1 (en) | 2013-03-05 | 2017-11-07 | Microsemi Solutions (U.S.), Inc. | Layer specific LDPC decoder |
US10230396B1 (en) | 2013-03-05 | 2019-03-12 | Microsemi Solutions (Us), Inc. | Method and apparatus for layer-specific LDPC decoding |
US9081701B1 (en) | 2013-03-15 | 2015-07-14 | Pmc-Sierra, Inc. | Systems and methods for decoding data for solid-state memory |
US9053012B1 (en) | 2013-03-15 | 2015-06-09 | Pmc-Sierra, Inc. | Systems and methods for storing data for solid-state memory |
US9208018B1 (en) | 2013-03-15 | 2015-12-08 | Pmc-Sierra, Inc. | Systems and methods for reclaiming memory for solid-state memory |
US9450610B1 (en) | 2013-03-15 | 2016-09-20 | Microsemi Storage Solutions (Us), Inc. | High quality log likelihood ratios determined using two-index look-up table |
US9009565B1 (en) | 2013-03-15 | 2015-04-14 | Pmc-Sierra, Inc. | Systems and methods for mapping for solid-state memory |
US9026867B1 (en) | 2013-03-15 | 2015-05-05 | Pmc-Sierra, Inc. | Systems and methods for adapting to changing characteristics of multi-level cells in solid-state memory |
US9136876B1 (en) | 2013-06-13 | 2015-09-15 | Densbits Technologies Ltd. | Size limited multi-dimensional decoding |
US9112653B2 (en) * | 2013-06-19 | 2015-08-18 | Mitsubishi Electric Research Laboratories, Inc. | Method and system for modulating optical signals as high-dimensional lattice constellation points to increase tolerance to noise |
US9313561B1 (en) * | 2013-07-11 | 2016-04-12 | Inphi Corporation | Integrated driver redundancy for a silicon photonics device |
US9455799B2 (en) | 2013-08-06 | 2016-09-27 | OptCTS, Inc. | Dynamic control of quality of service (QOS) using derived QOS measures |
US9444580B2 (en) | 2013-08-06 | 2016-09-13 | OptCTS, Inc. | Optimized data transfer utilizing optimized code table signaling |
US10523490B2 (en) | 2013-08-06 | 2019-12-31 | Agilepq, Inc. | Authentication of a subscribed code table user utilizing optimized code table signaling |
US9413491B1 (en) | 2013-10-08 | 2016-08-09 | Avago Technologies General Ip (Singapore) Pte. Ltd. | System and method for multiple dimension decoding and encoding a message |
US9786388B1 (en) | 2013-10-09 | 2017-10-10 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Detecting and managing bad columns |
US9348694B1 (en) | 2013-10-09 | 2016-05-24 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Detecting and managing bad columns |
US9397706B1 (en) | 2013-10-09 | 2016-07-19 | Avago Technologies General Ip (Singapore) Pte. Ltd. | System and method for irregular multiple dimension decoding and encoding |
US9559725B1 (en) | 2013-10-23 | 2017-01-31 | Seagate Technology Llc | Multi-strength reed-solomon outer code protection |
US9171624B2 (en) | 2013-12-20 | 2015-10-27 | Apple Inc. | Management of data storage in analog memory cells using a non-integer number of bits per cell |
US9645763B2 (en) | 2014-01-13 | 2017-05-09 | Seagate Technology Llc | Framework for balancing robustness and latency during collection of statistics from soft reads |
US9536612B1 (en) | 2014-01-23 | 2017-01-03 | Avago Technologies General Ip (Singapore) Pte. Ltd | Digital signaling processing for three dimensional flash memory arrays |
US10120792B1 (en) | 2014-01-29 | 2018-11-06 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Programming an embedded flash storage device |
US9685242B2 (en) * | 2014-03-11 | 2017-06-20 | Kabushiki Kaisha Toshiba | Memory system |
US9319178B2 (en) | 2014-03-14 | 2016-04-19 | Qualcomm Incorporated | Method for using error correction codes with N factorial or CCI extension |
US9542262B1 (en) | 2014-05-29 | 2017-01-10 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Error correction |
TWI530959B (zh) | 2014-06-17 | 2016-04-21 | 慧榮科技股份有限公司 | 用來控制一記憶裝置之方法以及記憶裝置與控制器 |
US9892033B1 (en) | 2014-06-24 | 2018-02-13 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Management of memory units |
GB2527604A (en) | 2014-06-27 | 2015-12-30 | Ibm | Data encoding in solid-state storage devices |
US10056919B2 (en) | 2014-07-02 | 2018-08-21 | Agilepq, Inc. | Data recovery utilizing optimized code table signaling |
US9972393B1 (en) | 2014-07-03 | 2018-05-15 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Accelerating programming of a flash memory module |
US9584159B1 (en) | 2014-07-03 | 2017-02-28 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Interleaved encoding |
US9417804B2 (en) | 2014-07-07 | 2016-08-16 | Microsemi Storage Solutions (Us), Inc. | System and method for memory block pool wear leveling |
US9449702B1 (en) | 2014-07-08 | 2016-09-20 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Power management |
WO2016051599A1 (ja) * | 2014-10-03 | 2016-04-07 | 株式会社日立製作所 | メモリコントローラ及びデータ制御方法 |
US9524211B1 (en) | 2014-11-18 | 2016-12-20 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Codeword management |
WO2016092245A1 (en) * | 2014-12-11 | 2016-06-16 | Toshiba Research Europe Limited | Array codes |
US9613664B2 (en) * | 2015-01-20 | 2017-04-04 | Samsung Electronics Co., Ltd. | Method of operating memory device including multi-level memory cells |
US10305515B1 (en) | 2015-02-02 | 2019-05-28 | Avago Technologies International Sales Pte. Limited | System and method for encoding using multiple linear feedback shift registers |
US10332613B1 (en) | 2015-05-18 | 2019-06-25 | Microsemi Solutions (Us), Inc. | Nonvolatile memory system with retention monitor |
US10628255B1 (en) | 2015-06-11 | 2020-04-21 | Avago Technologies International Sales Pte. Limited | Multi-dimensional decoding |
US9851921B1 (en) | 2015-07-05 | 2017-12-26 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Flash memory chip processing |
US9799405B1 (en) | 2015-07-29 | 2017-10-24 | Ip Gem Group, Llc | Nonvolatile memory system with read circuit for performing reads using threshold voltage shift read instruction |
US9577854B1 (en) * | 2015-08-20 | 2017-02-21 | Micron Technology, Inc. | Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding |
KR20170068681A (ko) * | 2015-12-09 | 2017-06-20 | 에스케이하이닉스 주식회사 | 데이터 저장 장치 및 그것의 동작 방법 |
US9886214B2 (en) | 2015-12-11 | 2018-02-06 | Ip Gem Group, Llc | Nonvolatile memory system with erase suspend circuit and method for erase suspend management |
US9892794B2 (en) | 2016-01-04 | 2018-02-13 | Ip Gem Group, Llc | Method and apparatus with program suspend using test mode |
US9899092B2 (en) | 2016-01-27 | 2018-02-20 | Ip Gem Group, Llc | Nonvolatile memory system with program step manager and method for program step management |
US9954558B1 (en) | 2016-03-03 | 2018-04-24 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Fast decoding of data stored in a flash memory |
AU2017278253A1 (en) | 2016-06-06 | 2019-01-24 | Agilepq, Inc. | Data conversion systems and methods |
US10291263B2 (en) | 2016-07-28 | 2019-05-14 | Ip Gem Group, Llc | Auto-learning log likelihood ratio |
US10283215B2 (en) | 2016-07-28 | 2019-05-07 | Ip Gem Group, Llc | Nonvolatile memory system with background reference positioning and local reference positioning |
US10236915B2 (en) | 2016-07-29 | 2019-03-19 | Microsemi Solutions (U.S.), Inc. | Variable T BCH encoding |
US10175890B2 (en) | 2016-12-22 | 2019-01-08 | Western Digital Technologies, Inc. | Non-binary ECCs for low latency read, fractional bits per cell of NAND flash |
US10263639B2 (en) | 2017-02-07 | 2019-04-16 | Alibaba Group Holding Limited | Managing soft information in high-capacity solid state drive |
US10164817B2 (en) | 2017-03-21 | 2018-12-25 | Micron Technology, Inc. | Methods and apparatuses for signal translation in a buffered memory |
CN107705817B (zh) * | 2017-09-22 | 2020-09-08 | 山东存储之翼电子科技有限公司 | 利用闪存通道特性的解码方法、装置及数据存储系统 |
US10446198B2 (en) | 2017-10-02 | 2019-10-15 | Micron Technology, Inc. | Multiple concurrent modulation schemes in a memory system |
US10355893B2 (en) | 2017-10-02 | 2019-07-16 | Micron Technology, Inc. | Multiplexing distinct signals on a single pin of a memory device |
US11403241B2 (en) | 2017-10-02 | 2022-08-02 | Micron Technology, Inc. | Communicating data with stacked memory dies |
US10725913B2 (en) | 2017-10-02 | 2020-07-28 | Micron Technology, Inc. | Variable modulation scheme for memory device access or operation |
US10304550B1 (en) | 2017-11-29 | 2019-05-28 | Sandisk Technologies Llc | Sense amplifier with negative threshold sensing for non-volatile memory |
US10411808B2 (en) * | 2018-01-05 | 2019-09-10 | Zte Corporation | Probabilistically shaped multi-level pulse modulation with gray code mapping |
DE102018112215B3 (de) * | 2018-04-30 | 2019-07-25 | Basler Ag | Quantisiererbestimmung, computerlesbares Medium und Vorrichtung, die mindestens zwei Quantisierer implementiert |
US10910044B2 (en) | 2018-09-28 | 2021-02-02 | Sandisk Technologies Llc | State coding for fractional bits-per-cell memory |
US10643695B1 (en) | 2019-01-10 | 2020-05-05 | Sandisk Technologies Llc | Concurrent multi-state program verify for non-volatile memory |
US11024392B1 (en) | 2019-12-23 | 2021-06-01 | Sandisk Technologies Llc | Sense amplifier for bidirectional sensing of memory cells of a non-volatile memory |
US11231870B1 (en) | 2020-08-11 | 2022-01-25 | Micron Technology, Inc. | Memory sub-system retirement determination |
US11556416B2 (en) | 2021-05-05 | 2023-01-17 | Apple Inc. | Controlling memory readout reliability and throughput by adjusting distance between read thresholds |
US11847342B2 (en) | 2021-07-28 | 2023-12-19 | Apple Inc. | Efficient transfer of hard data and confidence levels in reading a nonvolatile memory |
US11960776B2 (en) * | 2022-06-02 | 2024-04-16 | Micron Technology, Inc. | Data protection for stacks of memory dice |
US12093124B2 (en) * | 2022-09-29 | 2024-09-17 | Advanced Micro Devices, Inc. | Multi-level signal reception |
TWI819876B (zh) * | 2022-11-02 | 2023-10-21 | 群聯電子股份有限公司 | 資料儲存方法、記憶體儲存裝置及記憶體控制電路單元 |
Family Cites Families (61)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6011360B2 (ja) * | 1981-12-15 | 1985-03-25 | ケイディディ株式会社 | 音声符号化方式 |
US4675863A (en) * | 1985-03-20 | 1987-06-23 | International Mobile Machines Corp. | Subscriber RF telephone system for providing multiple speech and/or data signals simultaneously over either a single or a plurality of RF channels |
NL9100218A (nl) * | 1991-02-07 | 1992-09-01 | Philips Nv | Encodeer/decodeer-schakeling, alsmede digitaal video-systeem voorzien van de schakeling. |
US6222762B1 (en) * | 1992-01-14 | 2001-04-24 | Sandisk Corporation | Multi-state memory |
US5365530A (en) * | 1992-05-12 | 1994-11-15 | Mitsubishi Denki Kabushiki Kaisha | Error-correction encoding and decoding system |
JP3999822B2 (ja) * | 1993-12-28 | 2007-10-31 | 株式会社東芝 | 記憶システム |
JPH09251427A (ja) | 1996-03-18 | 1997-09-22 | Nec Home Electron Ltd | フラッシュメモリの符号誤り訂正装置及び方法 |
US5969985A (en) * | 1996-03-18 | 1999-10-19 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
JPH09284348A (ja) * | 1996-04-15 | 1997-10-31 | Ricoh Co Ltd | 復号方法 |
JP3200012B2 (ja) * | 1996-04-19 | 2001-08-20 | 株式会社東芝 | 記憶システム |
US5815439A (en) | 1996-04-30 | 1998-09-29 | Agate Semiconductor, Inc. | Stabilization circuits and techniques for storage and retrieval of single or multiple digital bits per memory cell |
JPH1055687A (ja) * | 1996-08-09 | 1998-02-24 | Sony Corp | 不揮発性半導体記憶装置 |
WO1998009219A1 (de) * | 1996-08-30 | 1998-03-05 | Siemens Aktiengesellschaft | Fehlererkennung in einem speichersystem |
KR100219842B1 (ko) * | 1997-03-12 | 1999-09-01 | 서평원 | 이동 전화시스템 |
KR100246184B1 (ko) | 1997-07-02 | 2000-03-15 | 김영환 | 리드-솔로몬 에러 정정 코드를 이용한 프레쉬 메모리 시스템의 운영 방법 |
JPH1173797A (ja) * | 1997-08-27 | 1999-03-16 | Sony Corp | 記憶装置 |
JPH11136139A (ja) * | 1997-11-04 | 1999-05-21 | Hitachi Ltd | 復号方法および装置、記憶装置およびこれを用いた情報機器、メモリチップ、記録符号、光通信システム |
JPH11143787A (ja) * | 1997-11-06 | 1999-05-28 | Hitachi Ltd | 記録再生装置 |
US6279133B1 (en) * | 1997-12-31 | 2001-08-21 | Kawasaki Steel Corporation | Method and apparatus for significantly improving the reliability of multilevel memory architecture |
JPH11213693A (ja) * | 1998-01-27 | 1999-08-06 | Sony Corp | メモリ装置 |
US7083108B2 (en) * | 1998-07-10 | 2006-08-01 | Silverbrook Research Pty Ltd | Redundantly encoded data structure for encoding a surface |
US6397364B1 (en) * | 1998-04-20 | 2002-05-28 | Mordecai Barkan | Digital data representation for multi-bit data storage and transmission |
JP2000286719A (ja) * | 1999-03-31 | 2000-10-13 | Mitsubishi Electric Corp | 誤り訂正システム |
JP4074029B2 (ja) | 1999-06-28 | 2008-04-09 | 株式会社東芝 | フラッシュメモリ |
US7356639B2 (en) * | 2000-01-05 | 2008-04-08 | Rambus Inc. | Configurable width buffered module having a bypass circuit |
US7404032B2 (en) * | 2000-01-05 | 2008-07-22 | Rambus Inc. | Configurable width buffered module having switch elements |
US7363422B2 (en) * | 2000-01-05 | 2008-04-22 | Rambus Inc. | Configurable width buffered module |
US7890846B2 (en) * | 2000-01-06 | 2011-02-15 | Supertalent Electronics, Inc. | Electronic data flash card with Reed Solomon error detection and correction capability |
US6715116B2 (en) * | 2000-01-26 | 2004-03-30 | Hewlett-Packard Company, L.P. | Memory data verify operation |
US6810502B2 (en) * | 2000-01-28 | 2004-10-26 | Conexant Systems, Inc. | Iteractive decoder employing multiple external code error checks to lower the error floor |
JP2001332982A (ja) * | 2000-05-18 | 2001-11-30 | Mitsubishi Electric Corp | 光伝送システム、fec多重化装置、fec多重分離装置、および誤り訂正方法 |
JP2002100192A (ja) * | 2000-09-22 | 2002-04-05 | Toshiba Corp | 不揮発性半導体メモリ |
EP1329070A2 (de) * | 2000-10-16 | 2003-07-23 | Systemonic AG | Verfahren zur erzeugung von soft-bit-informationen aus gray-codierten signalen |
US20030126545A1 (en) * | 2001-10-05 | 2003-07-03 | Tan Alfred Keng Tiong | Non-linear code-division multiple access technology with improved detection algorithms and error correction coding |
JP3515519B2 (ja) * | 2000-12-28 | 2004-04-05 | 三洋電機株式会社 | データ受信装置 |
US6724658B2 (en) * | 2001-01-15 | 2004-04-20 | Stmicroelectronics S.R.L. | Method and circuit for generating reference voltages for reading a multilevel memory cell |
JP4417629B2 (ja) | 2001-04-24 | 2010-02-17 | エヌエックスピー ビー ヴィ | ビット変更を可能にする、フラッシュメモリにおける使用のための、改良されたエラー修正方式 |
JP3578736B2 (ja) * | 2001-08-07 | 2004-10-20 | Necマイクロシステム株式会社 | ブランチメトリック算出装置およびその算出方法 |
US7142612B2 (en) * | 2001-11-16 | 2006-11-28 | Rambus, Inc. | Method and apparatus for multi-level signaling |
KR100487417B1 (ko) * | 2001-12-13 | 2005-05-03 | 주식회사 하이닉스반도체 | 불휘발성 강유전체 메모리 장치 및 그를 이용한멀티플-비트 데이타의 라이트 및 리드 방법 |
EP1355234B1 (en) * | 2002-04-15 | 2016-06-29 | Micron Technology, Inc. | Use of an error correction circuit in program and erase verify procedures |
US6751766B2 (en) * | 2002-05-20 | 2004-06-15 | Sandisk Corporation | Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data |
TW575806B (en) | 2002-07-15 | 2004-02-11 | Silicon Motion Tech Inc | A method for enhancing flash memory error correction capability and providing data encryption in the same time |
JP4086583B2 (ja) * | 2002-08-08 | 2008-05-14 | シャープ株式会社 | 不揮発性半導体メモリ装置およびデータ書き込み制御方法 |
US20040083334A1 (en) * | 2002-10-28 | 2004-04-29 | Sandisk Corporation | Method and apparatus for managing the integrity of data in non-volatile memory system |
US7379505B2 (en) * | 2003-02-13 | 2008-05-27 | Broadcom Corporation | Method and apparatus for performing trellis coded modulation of signals for transmission on a TDMA channel of a cable network |
JP4188744B2 (ja) * | 2003-04-08 | 2008-11-26 | 株式会社ルネサステクノロジ | メモリカード |
JP2005078721A (ja) * | 2003-09-01 | 2005-03-24 | Nippon Telegr & Teleph Corp <Ntt> | 誤り訂正方法およびメモリ回路 |
US7012835B2 (en) | 2003-10-03 | 2006-03-14 | Sandisk Corporation | Flash memory data correction and scrub techniques |
KR100547146B1 (ko) * | 2003-10-06 | 2006-01-26 | 삼성전자주식회사 | 영상처리장치 및 그 방법 |
JP4056488B2 (ja) * | 2004-03-30 | 2008-03-05 | エルピーダメモリ株式会社 | 半導体装置の試験方法及び製造方法 |
US7057939B2 (en) * | 2004-04-23 | 2006-06-06 | Sandisk Corporation | Non-volatile memory and control with improved partial page program capability |
JP4135680B2 (ja) * | 2004-05-31 | 2008-08-20 | ソニー株式会社 | 半導体記憶装置および信号処理システム |
JP2006048783A (ja) * | 2004-08-02 | 2006-02-16 | Renesas Technology Corp | 不揮発性メモリおよびメモリカード |
JP4614732B2 (ja) * | 2004-10-22 | 2011-01-19 | パナソニック株式会社 | デコード装置 |
JP2006134536A (ja) * | 2004-11-09 | 2006-05-25 | Matsushita Electric Ind Co Ltd | 不揮発性半導体記憶装置およびその読み出し方法 |
US7430138B2 (en) * | 2005-03-31 | 2008-09-30 | Sandisk Corporation | Erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells |
US7457166B2 (en) * | 2005-03-31 | 2008-11-25 | Sandisk Corporation | Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage |
KR100680473B1 (ko) * | 2005-04-11 | 2007-02-08 | 주식회사 하이닉스반도체 | 액세스 시간이 감소된 플래시 메모리 장치 |
US7366022B2 (en) * | 2005-10-27 | 2008-04-29 | Sandisk Corporation | Apparatus for programming of multi-state non-volatile memory using smart verify |
US7535766B2 (en) * | 2006-10-13 | 2009-05-19 | Sandisk Corporation | Systems for partitioned soft programming in non-volatile memory |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014517976A (ja) * | 2011-05-12 | 2014-07-24 | マイクロン テクノロジー, インク. | メモリセルをプログラミングすること |
Also Published As
Publication number | Publication date |
---|---|
US20150058702A1 (en) | 2015-02-26 |
EP1987519B1 (en) | 2015-08-19 |
US20110060969A1 (en) | 2011-03-10 |
TW201126527A (en) | 2011-08-01 |
US7844879B2 (en) | 2010-11-30 |
WO2007084749A2 (en) | 2007-07-26 |
US8473812B2 (en) | 2013-06-25 |
TWI455137B (zh) | 2014-10-01 |
TW200737213A (en) | 2007-10-01 |
EP1987519A2 (en) | 2008-11-05 |
WO2007084749A3 (en) | 2008-04-10 |
US20140201600A1 (en) | 2014-07-17 |
KR20080098040A (ko) | 2008-11-06 |
KR101410434B1 (ko) | 2014-07-02 |
TWI367492B (en) | 2012-07-01 |
US20070171730A1 (en) | 2007-07-26 |
US8677215B2 (en) | 2014-03-18 |
US20130290813A1 (en) | 2013-10-31 |
EP1987519A4 (en) | 2009-07-29 |
JP2009524176A (ja) | 2009-06-25 |
US8856622B2 (en) | 2014-10-07 |
US9053051B2 (en) | 2015-06-09 |
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