JP5210839B2 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
JP5210839B2
JP5210839B2 JP2008314434A JP2008314434A JP5210839B2 JP 5210839 B2 JP5210839 B2 JP 5210839B2 JP 2008314434 A JP2008314434 A JP 2008314434A JP 2008314434 A JP2008314434 A JP 2008314434A JP 5210839 B2 JP5210839 B2 JP 5210839B2
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JP
Japan
Prior art keywords
layer
forming
pad
wiring board
base material
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Active
Application number
JP2008314434A
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English (en)
Japanese (ja)
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JP2010141018A5 (enExample
JP2010141018A (ja
Inventor
健太郎 金子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2008314434A priority Critical patent/JP5210839B2/ja
Priority to US12/628,284 priority patent/US20100139962A1/en
Publication of JP2010141018A publication Critical patent/JP2010141018A/ja
Publication of JP2010141018A5 publication Critical patent/JP2010141018A5/ja
Application granted granted Critical
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0014—Shaping of the substrate, e.g. by moulding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305—Affixing by adhesive
    • H10W70/05—
    • H10W70/685—
    • H10W74/012—
    • H10W74/15—
    • H10W90/701—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09045—Locally raised area or protrusion of insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09136—Means for correcting warpage
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H10W72/01308—
    • H10W72/07311—
    • H10W72/07353—
    • H10W72/334—
    • H10W72/387—
    • H10W72/856—
    • H10W72/931—
    • H10W90/724—
    • H10W90/734—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2008314434A 2008-12-10 2008-12-10 配線基板及びその製造方法 Active JP5210839B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008314434A JP5210839B2 (ja) 2008-12-10 2008-12-10 配線基板及びその製造方法
US12/628,284 US20100139962A1 (en) 2008-12-10 2009-12-01 Wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008314434A JP5210839B2 (ja) 2008-12-10 2008-12-10 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2010141018A JP2010141018A (ja) 2010-06-24
JP2010141018A5 JP2010141018A5 (enExample) 2011-10-06
JP5210839B2 true JP5210839B2 (ja) 2013-06-12

Family

ID=42229810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008314434A Active JP5210839B2 (ja) 2008-12-10 2008-12-10 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US20100139962A1 (enExample)
JP (1) JP5210839B2 (enExample)

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JP5147677B2 (ja) * 2008-12-24 2013-02-20 新光電気工業株式会社 樹脂封止パッケージの製造方法
KR101089956B1 (ko) * 2009-10-28 2011-12-05 삼성전기주식회사 플립칩 패키지 및 그의 제조방법
JP5638269B2 (ja) * 2010-03-26 2014-12-10 日本特殊陶業株式会社 多層配線基板
JP5701550B2 (ja) * 2010-09-17 2015-04-15 オリンパス株式会社 撮像装置および撮像装置の製造方法
US8399300B2 (en) * 2010-04-27 2013-03-19 Stats Chippac, Ltd. Semiconductor device and method of forming adjacent channel and DAM material around die attach area of substrate to control outward flow of underfill material
JP2012109307A (ja) * 2010-11-15 2012-06-07 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法
JP5886617B2 (ja) * 2011-12-02 2016-03-16 新光電気工業株式会社 配線基板及びその製造方法、半導体パッケージ
JP2014063844A (ja) * 2012-09-20 2014-04-10 Sony Corp 半導体装置、半導体装置の製造方法及び電子機器
JP2014072372A (ja) * 2012-09-28 2014-04-21 Ibiden Co Ltd プリント配線板の製造方法及びプリント配線板
US9627229B2 (en) * 2013-06-27 2017-04-18 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming trench and disposing semiconductor die over substrate to control outward flow of underfill material
JP6161437B2 (ja) * 2013-07-03 2017-07-12 新光電気工業株式会社 配線基板及びその製造方法、半導体パッケージ
JP5918809B2 (ja) * 2014-07-04 2016-05-18 株式会社イースタン 配線基板の製造方法および配線基板
TWI551207B (zh) * 2014-09-12 2016-09-21 矽品精密工業股份有限公司 基板結構及其製法
JP6058051B2 (ja) * 2015-03-05 2017-01-11 ルネサスエレクトロニクス株式会社 半導体装置
US20170179042A1 (en) * 2015-12-17 2017-06-22 International Business Machines Corporation Protection of elements on a laminate surface
JP2017152484A (ja) * 2016-02-23 2017-08-31 京セラ株式会社 配線基板
FR3056073B1 (fr) * 2016-09-09 2018-08-17 Valeo Systemes De Controle Moteur Unite electronique, convertisseur de tension la comprenant et equipement electrique comprenant un tel convertisseur de tension
KR20200003113A (ko) * 2017-05-03 2020-01-08 후아웨이 테크놀러지 컴퍼니 리미티드 Pcb, 패키지 구조체, 단말기 및 pcb 가공 방법
US10586716B2 (en) 2017-06-09 2020-03-10 Advanced Semiconductor Engineering, Inc. Semiconductor device package
US11282717B2 (en) 2018-03-30 2022-03-22 Intel Corporation Micro-electronic package with substrate protrusion to facilitate dispense of underfill between a narrow die-to-die gap
JP7366578B2 (ja) * 2018-06-18 2023-10-23 キヤノン株式会社 電子モジュール及び電子機器
JP2020053563A (ja) * 2018-09-27 2020-04-02 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
WO2020132019A1 (en) * 2018-12-18 2020-06-25 Octavo Systems Llc Molded packages in a molded device
JP7365801B2 (ja) * 2019-07-11 2023-10-20 キヤノンメディカルシステムズ株式会社 基板、ｘ線検出器用の基板、及び、ｘ線検出器の製造方法
JP2021093435A (ja) * 2019-12-10 2021-06-17 イビデン株式会社 プリント配線板
FR3109466B1 (fr) * 2020-04-16 2024-05-17 St Microelectronics Grenoble 2 Dispositif de support d’une puce électronique et procédé de fabrication correspondant
US20220069489A1 (en) * 2020-08-28 2022-03-03 Unimicron Technology Corp. Circuit board structure and manufacturing method thereof
CN113035831A (zh) * 2021-05-25 2021-06-25 甬矽电子(宁波)股份有限公司 晶圆级芯片封装结构及其制作方法和电子设备
US12494419B2 (en) 2021-08-11 2025-12-09 Stmicroelectronics (Malta) Ltd. Integrated circuit package with warpage control using cavity formed in laminated substrate below the integrated circuit die

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JP2003209366A (ja) * 2002-01-15 2003-07-25 Sony Corp フレキシブル多層配線基板およびその製造方法
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JP2007096337A (ja) * 2004-07-07 2007-04-12 Nec Corp 半導体搭載用配線基板、半導体パッケージ、及びその製造方法
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JP2010141018A (ja) 2010-06-24

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