JP5638269B2 - 多層配線基板 - Google Patents
多層配線基板 Download PDFInfo
- Publication number
- JP5638269B2 JP5638269B2 JP2010073436A JP2010073436A JP5638269B2 JP 5638269 B2 JP5638269 B2 JP 5638269B2 JP 2010073436 A JP2010073436 A JP 2010073436A JP 2010073436 A JP2010073436 A JP 2010073436A JP 5638269 B2 JP5638269 B2 JP 5638269B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- surface side
- main surface
- wiring board
- solder resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/099—Coating over pads, e.g. solder resist partly over pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0361—Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
以下、本発明を多層配線基板に具体化した第1の実施の形態を図面に基づき詳細に説明する。図1は、本実施の形態の多層配線基板の概略構成を示す拡大断面図である。また、図2は、上面側から見た多層配線基板の平面図であり、図3は、下面側から見た多層配線基板の平面図である。
[第2の実施の形態]
20…ソルダーレジストとしての樹脂絶縁層
21〜23…樹脂絶縁層
25…ソルダーレジスト
26…導体層
30,30A…積層構造体としての配線積層部
31…第1主面としての上面
32…第2主面としての下面
34…ビア導体
35,36,37…開口部
41…第1主面側接続端子としてのICチップ接続端子
42…第1主面側接続端子としてのコンデンサ接続端子
44…銅層
44a…主面側外周部
44b…主面側中央部
45…第2主面側接続端子としての母基板接続端子
46,48…金属層としてのめっき層
46a,48a…ニッケル層としてのニッケルめっき層
46,48…金層としての金めっき層
47…凹所
Claims (3)
- 同じ樹脂絶縁材料を主体とする複数の樹脂絶縁層及び複数の導体層を交互に積層して多層化した積層構造体を有し、前記積層構造体の第1主面側には複数の第1主面側接続端子が配置され、前記積層構造体の第2主面側には複数の第2主面側接続端子が配置され、前記複数の導体層は、前記複数の樹脂絶縁層に形成され、前記第1主面側または前記第2主面側に向うに従って拡径したビア導体により接続されている多層配線基板であって、
前記積層構造体の前記第1主面側または前記第2主面側には、複数の開口部を有するソルダーレジストが配設され、
前記複数の第1主面側接続端子または前記複数の第2主面側接続端子は、主体をなす銅層と銅以外の1種以上の金属からなる金属層とにより構成されるとともに、前記ソルダーレジストに接している最外層の樹脂絶縁層に埋設され、
前記銅層の主面側外周部は、前記ソルダーレジストにより覆われ、
前記銅層の主面側中央部に存在し入口が狭く内部が広くなっている凹所には、前記金属層の少なくとも一部が埋まり込むようにして設けられ、
前記金属層の少なくとも一部は、前記複数の開口部を介して露出しており、
前記金属層は金層とニッケル層とを含んで構成され、前記開口部の外周縁を含む前記ソルダーレジストの内層側の表面が前記銅層と接するとともに、前記金層が前記ソルダーレジストと接しない
ことを特徴とする多層配線基板。 - 前記ソルダーレジストと前記最外層の樹脂絶縁層との界面に存在する前記導体層は、前記最外層の樹脂絶縁層側に埋設されていることを特徴とする請求項1に記載の多層配線基板。
- 前記銅層の表面から前記金属層が突出しないことを特徴とする請求項1または2に記載の多層配線基板。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010073436A JP5638269B2 (ja) | 2010-03-26 | 2010-03-26 | 多層配線基板 |
US13/070,094 US8658905B2 (en) | 2010-03-26 | 2011-03-23 | Multilayer wiring substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010073436A JP5638269B2 (ja) | 2010-03-26 | 2010-03-26 | 多層配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011205036A JP2011205036A (ja) | 2011-10-13 |
JP5638269B2 true JP5638269B2 (ja) | 2014-12-10 |
Family
ID=44655063
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010073436A Expired - Fee Related JP5638269B2 (ja) | 2010-03-26 | 2010-03-26 | 多層配線基板 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8658905B2 (ja) |
JP (1) | JP5638269B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101855570B1 (ko) | 2015-08-14 | 2018-05-04 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 반도체 디바이스 구조물 및 그것의 형성 방법 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5566720B2 (ja) * | 2010-02-16 | 2014-08-06 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
TWI444123B (zh) * | 2012-02-16 | 2014-07-01 | Via Tech Inc | 線路板製作方法及線路板 |
JP6123915B2 (ja) * | 2014-02-07 | 2017-05-10 | 株式会社村田製作所 | 樹脂多層基板 |
WO2022022419A1 (zh) * | 2020-07-31 | 2022-02-03 | 华为技术有限公司 | 电路板组件及其加工方法、电子设备 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH04146864A (ja) | 1990-10-05 | 1992-05-20 | Toyota Motor Corp | 車両用液圧ブースタ |
JPH09298252A (ja) * | 1996-05-01 | 1997-11-18 | Shinko Electric Ind Co Ltd | 半導体パッケージ及びこれを用いた半導体装置 |
WO1999044403A1 (fr) * | 1998-02-26 | 1999-09-02 | Ibiden Co., Ltd. | Carte a circuits imprimes multicouche avec structure de trous d'interconnexion pleins |
DE69936319T2 (de) * | 1998-12-16 | 2008-02-14 | Ibiden Co., Ltd., Ogaki | Leitender verbindungsstift und baugruppenplatte |
JP4520665B2 (ja) * | 2001-06-08 | 2010-08-11 | 日本シイエムケイ株式会社 | プリント配線板及びその製造方法並びに部品実装構造 |
JP3661695B2 (ja) * | 2003-07-11 | 2005-06-15 | 株式会社デンソー | 半導体装置 |
JP4146864B2 (ja) | 2005-05-31 | 2008-09-10 | 新光電気工業株式会社 | 配線基板及びその製造方法、並びに半導体装置及び半導体装置の製造方法 |
KR100771467B1 (ko) * | 2006-10-30 | 2007-10-30 | 삼성전기주식회사 | 회로기판 및 그 제조방법 |
JP5324051B2 (ja) * | 2007-03-29 | 2013-10-23 | 新光電気工業株式会社 | 配線基板の製造方法及び半導体装置の製造方法及び配線基板 |
JP5079475B2 (ja) * | 2007-12-05 | 2012-11-21 | 新光電気工業株式会社 | 電子部品実装用パッケージ |
JP4993739B2 (ja) | 2007-12-06 | 2012-08-08 | 新光電気工業株式会社 | 配線基板、その製造方法及び電子部品装置 |
JP5284147B2 (ja) * | 2008-03-13 | 2013-09-11 | 日本特殊陶業株式会社 | 多層配線基板 |
CN102802344B (zh) * | 2008-09-30 | 2015-06-17 | 揖斐电株式会社 | 多层印刷线路板以及多层印刷线路板的制造方法 |
JP2010114434A (ja) * | 2008-10-08 | 2010-05-20 | Ngk Spark Plug Co Ltd | 部品内蔵配線基板及びその製造方法 |
KR101006619B1 (ko) * | 2008-10-20 | 2011-01-07 | 삼성전기주식회사 | 라운드형 솔더범프를 갖는 인쇄회로기판 및 그 제조방법 |
JP5306789B2 (ja) * | 2008-12-03 | 2013-10-02 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
JP5210839B2 (ja) * | 2008-12-10 | 2013-06-12 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
-
2010
- 2010-03-26 JP JP2010073436A patent/JP5638269B2/ja not_active Expired - Fee Related
-
2011
- 2011-03-23 US US13/070,094 patent/US8658905B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101855570B1 (ko) | 2015-08-14 | 2018-05-04 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 반도체 디바이스 구조물 및 그것의 형성 방법 |
Also Published As
Publication number | Publication date |
---|---|
US20110232951A1 (en) | 2011-09-29 |
JP2011205036A (ja) | 2011-10-13 |
US8658905B2 (en) | 2014-02-25 |
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