JP3868777B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP3868777B2
JP3868777B2 JP2001274504A JP2001274504A JP3868777B2 JP 3868777 B2 JP3868777 B2 JP 3868777B2 JP 2001274504 A JP2001274504 A JP 2001274504A JP 2001274504 A JP2001274504 A JP 2001274504A JP 3868777 B2 JP3868777 B2 JP 3868777B2
Authority
JP
Japan
Prior art keywords
electrode
semiconductor device
semiconductor chip
resin
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001274504A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003086737A (ja
JP2003086737A5 (https=
Inventor
浩治 森口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001274504A priority Critical patent/JP3868777B2/ja
Priority to CNB021416885A priority patent/CN1228837C/zh
Priority to US10/237,689 priority patent/US6784537B2/en
Publication of JP2003086737A publication Critical patent/JP2003086737A/ja
Publication of JP2003086737A5 publication Critical patent/JP2003086737A5/ja
Application granted granted Critical
Publication of JP3868777B2 publication Critical patent/JP3868777B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/856—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9413—Dispositions of bond pads on encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2001274504A 2001-09-11 2001-09-11 半導体装置 Expired - Fee Related JP3868777B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001274504A JP3868777B2 (ja) 2001-09-11 2001-09-11 半導体装置
CNB021416885A CN1228837C (zh) 2001-09-11 2002-09-10 半导体装置
US10/237,689 US6784537B2 (en) 2001-09-11 2002-09-10 Semiconductor device of surface-mounting type

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001274504A JP3868777B2 (ja) 2001-09-11 2001-09-11 半導体装置

Publications (3)

Publication Number Publication Date
JP2003086737A JP2003086737A (ja) 2003-03-20
JP2003086737A5 JP2003086737A5 (https=) 2005-10-27
JP3868777B2 true JP3868777B2 (ja) 2007-01-17

Family

ID=19099523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001274504A Expired - Fee Related JP3868777B2 (ja) 2001-09-11 2001-09-11 半導体装置

Country Status (3)

Country Link
US (1) US6784537B2 (https=)
JP (1) JP3868777B2 (https=)
CN (1) CN1228837C (https=)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7323361B2 (en) * 2002-03-29 2008-01-29 Fairchild Semiconductor Corporation Packaging system for semiconductor devices
US6794740B1 (en) * 2003-03-13 2004-09-21 Amkor Technology, Inc. Leadframe package for semiconductor devices
JP4294405B2 (ja) * 2003-07-31 2009-07-15 株式会社ルネサステクノロジ 半導体装置
US7315081B2 (en) * 2003-10-24 2008-01-01 International Rectifier Corporation Semiconductor device package utilizing proud interconnect material
JP4312616B2 (ja) * 2004-01-26 2009-08-12 Ｎｅｃエレクトロニクス株式会社 半導体装置
EP1603157B1 (en) * 2004-05-31 2008-01-09 STMicroelectronics S.r.l. Vertical conduction power electronic device package and corresponding assembling method
JP4468115B2 (ja) 2004-08-30 2010-05-26 株式会社ルネサステクノロジ 半導体装置
JP4153932B2 (ja) 2004-09-24 2008-09-24 株式会社東芝 半導体装置および半導体装置の製造方法
WO2006058030A2 (en) * 2004-11-23 2006-06-01 Siliconix Incorporated Semiconductor package including die interposed between cup-shaped lead frame and lead frame having mesas and valleys
US20060145319A1 (en) * 2004-12-31 2006-07-06 Ming Sun Flip chip contact (FCC) power package
US20060108635A1 (en) * 2004-11-23 2006-05-25 Alpha Omega Semiconductor Limited Trenched MOSFETS with part of the device formed on a (110) crystal plane
JP4547279B2 (ja) 2005-02-08 2010-09-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
DE102005011159B4 (de) * 2005-03-09 2013-05-16 Infineon Technologies Ag Halbleiterbauteil mit oberflächenmontierbaren Außenkontaktflächen und Verfahren zur Herstellung desselben
US7230333B2 (en) * 2005-04-21 2007-06-12 International Rectifier Corporation Semiconductor package
US7402462B2 (en) * 2005-07-12 2008-07-22 Fairchild Semiconductor Corporation Folded frame carrier for MOSFET BGA
JP4860994B2 (ja) * 2005-12-06 2012-01-25 ルネサスエレクトロニクス株式会社 半導体装置
US20070215997A1 (en) * 2006-03-17 2007-09-20 Martin Standing Chip-scale package
US7768075B2 (en) 2006-04-06 2010-08-03 Fairchild Semiconductor Corporation Semiconductor die packages using thin dies and metal substrates
US7772036B2 (en) * 2006-04-06 2010-08-10 Freescale Semiconductor, Inc. Lead frame based, over-molded semiconductor package with integrated through hole technology (THT) heat spreader pin(s) and associated method of manufacturing
US8124460B2 (en) * 2006-07-17 2012-02-28 Stats Chippac Ltd. Integrated circuit package system employing an exposed thermally conductive coating
DE102007002157A1 (de) * 2007-01-15 2008-07-17 Infineon Technologies Ag Halbleiteranordnung und zugehörige Herstellungsverfahren
US7879652B2 (en) * 2007-07-26 2011-02-01 Infineon Technologies Ag Semiconductor module
US8426960B2 (en) * 2007-12-21 2013-04-23 Alpha & Omega Semiconductor, Inc. Wafer level chip scale packaging
US7955893B2 (en) * 2008-01-31 2011-06-07 Alpha & Omega Semiconductor, Ltd Wafer level chip scale package and process of manufacture
US8680658B2 (en) * 2008-05-30 2014-03-25 Alpha And Omega Semiconductor Incorporated Conductive clip for semiconductor device package
US8482119B2 (en) * 2008-06-24 2013-07-09 Infineon Technologies Ag Semiconductor chip assembly
US8373257B2 (en) * 2008-09-25 2013-02-12 Alpha & Omega Semiconductor Incorporated Top exposed clip with window array
US7851856B2 (en) * 2008-12-29 2010-12-14 Alpha & Omega Semiconductor, Ltd True CSP power MOSFET based on bottom-source LDMOS
US8222078B2 (en) 2009-07-22 2012-07-17 Alpha And Omega Semiconductor Incorporated Chip scale surface mounted semiconductor device package and process of manufacture
JP2011049311A (ja) * 2009-08-26 2011-03-10 Shinko Electric Ind Co Ltd 半導体パッケージ及び製造方法
US20110075392A1 (en) * 2009-09-29 2011-03-31 Astec International Limited Assemblies and Methods for Directly Connecting Integrated Circuits to Electrically Conductive Sheets
JP2011151109A (ja) * 2010-01-20 2011-08-04 Fuji Electric Co Ltd 半導体装置およびその製造方法
JP5126278B2 (ja) * 2010-02-04 2013-01-23 株式会社デンソー 半導体装置およびその製造方法
US8362606B2 (en) 2010-07-29 2013-01-29 Alpha & Omega Semiconductor, Inc. Wafer level chip scale package
CN102005432B (zh) * 2010-09-30 2012-03-28 江苏长电科技股份有限公司 四面无引脚封装结构及其封装方法
US20120175688A1 (en) * 2011-01-10 2012-07-12 International Rectifier Corporation Semiconductor Package with Reduced On-Resistance and Top Metal Spreading Resistance with Application to Power Transistor Packaging
JP5822468B2 (ja) * 2011-01-11 2015-11-24 ローム株式会社 半導体装置
JP5601282B2 (ja) * 2011-06-01 2014-10-08 株式会社デンソー 半導体装置
JP5851897B2 (ja) * 2012-03-19 2016-02-03 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
TWI512851B (zh) * 2012-09-01 2015-12-11 萬國半導體股份有限公司 帶有厚底部基座的晶圓級封裝器件及其製備方法
US9087828B2 (en) 2013-03-12 2015-07-21 Alpha & Omega Semiconductor Incorporated Semiconductor device with thick bottom metal and preparation method thereof
JP6386746B2 (ja) * 2014-02-26 2018-09-05 株式会社ジェイデバイス 半導体装置
JP6538396B2 (ja) * 2015-03-27 2019-07-03 株式会社ジェイデバイス 半導体装置
WO2016203764A1 (ja) * 2015-06-17 2016-12-22 パナソニックＩｐマネジメント株式会社 半導体装置及びモジュール部品
US10777475B2 (en) 2015-12-04 2020-09-15 Renesas Electronics Corporation Semiconductor chip, semiconductor device, and electronic device
JP6851239B2 (ja) 2017-03-29 2021-03-31 エイブリック株式会社 樹脂封止型半導体装置およびその製造方法
WO2020129273A1 (ja) * 2018-12-21 2020-06-25 アオイ電子株式会社 半導体装置および半導体装置の製造方法
US11393743B2 (en) * 2019-12-18 2022-07-19 Infineon Technologies Ag Semiconductor assembly with conductive frame for I/O standoff and thermal dissipation

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09312374A (ja) * 1996-05-24 1997-12-02 Sony Corp 半導体パッケージ及びその製造方法
US6075289A (en) * 1996-10-24 2000-06-13 Tessera, Inc. Thermally enhanced packaged semiconductor assemblies
JP3695893B2 (ja) 1996-12-03 2005-09-14 沖電気工業株式会社 半導体装置とその製造方法および実装方法
JP3460559B2 (ja) * 1997-12-12 2003-10-27 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
EP0978871A3 (en) * 1998-08-05 2001-12-19 Harris Corporation A low power packaging design
JP4260263B2 (ja) * 1999-01-28 2009-04-30 株式会社ルネサステクノロジ 半導体装置
US6215180B1 (en) * 1999-03-17 2001-04-10 First International Computer Inc. Dual-sided heat dissipating structure for integrated circuit package
US6963141B2 (en) * 1999-12-31 2005-11-08 Jung-Yu Lee Semiconductor package for efficient heat spreading
TW454321B (en) * 2000-09-13 2001-09-11 Siliconware Precision Industries Co Ltd Semiconductor package with heat dissipation structure
TW476147B (en) * 2001-02-13 2002-02-11 Siliconware Precision Industries Co Ltd BGA semiconductor packaging with through ventilator heat dissipation structure
US6534859B1 (en) * 2002-04-05 2003-03-18 St. Assembly Test Services Ltd. Semiconductor package having heat sink attached to pre-molded cavities and method for creating the package

Also Published As

Publication number Publication date
CN1228837C (zh) 2005-11-23
JP2003086737A (ja) 2003-03-20
US6784537B2 (en) 2004-08-31
US20030052405A1 (en) 2003-03-20
CN1405881A (zh) 2003-03-26

Similar Documents

Publication Publication Date Title
JP3868777B2 (ja) 半導体装置
JP4698225B2 (ja) ドレインクリップを備えた半導体ダイパッケージ
CN1127761C (zh) 半导体装置
TWI450373B (zh) 雙側冷卻整合功率裝置封裝及模組，以及製造方法
JP5558714B2 (ja) 半導体パッケージ
CN109637983B (zh) 芯片封装
JPWO2018198990A1 (ja) 電子部品および半導体装置
KR20030032816A (ko) 반도체장치
US6841865B2 (en) Semiconductor device having clips for connecting to external elements
CN112151476A (zh) 半导体器件组件
TWI660471B (zh) 晶片封裝
JP4096741B2 (ja) 半導体装置
JP2003273319A (ja) 両面電極半導体素子を有する電子回路装置及び該電子回路装置の製造方法
JP5172290B2 (ja) 半導体装置
WO2018036319A1 (zh) 半导体封装结构及加工方法
CN114709185A (zh) 功率模块及其内部电气连接方法
JP2011176206A (ja) 半導体装置およびその製造方法
KR20220063570A (ko) 반도체 소자 패키지
CN113410185A (zh) 功率半导体器件封装结构及其制造方法
JP2006310609A (ja) 半導体装置
JP7838443B2 (ja) 半導体装置
JP2002076259A (ja) パワーモジュール
CN223566612U (zh) 一种GaN芯片的封装结构和电子设备
JP2002134560A (ja) 半導体装置
KR102410257B1 (ko) 양면냉각형 전력반도체 디스크리트 패키지

Legal Events

Date Code Title Description
RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20040528

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050719

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050719

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060705

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060713

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060911

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20061005

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20061011

R151 Written notification of patent or utility model registration

Ref document number: 3868777

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101020

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111020

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111020

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121020

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131020

Year of fee payment: 7

LAPS Cancellation because of no payment of annual fees