JP3634086B2 - 絶縁ゲイト型半導体装置の作製方法 - Google Patents

絶縁ゲイト型半導体装置の作製方法 Download PDF

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Publication number
JP3634086B2
JP3634086B2 JP23255396A JP23255396A JP3634086B2 JP 3634086 B2 JP3634086 B2 JP 3634086B2 JP 23255396 A JP23255396 A JP 23255396A JP 23255396 A JP23255396 A JP 23255396A JP 3634086 B2 JP3634086 B2 JP 3634086B2
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region
impurity
channel
impurity element
drain
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Expired - Fee Related
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JP23255396A
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Japanese (ja)
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JPH1065164A (ja
JPH1065164A5 (enExample
Inventor
舜平 山崎
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP23255396A priority Critical patent/JP3634086B2/ja
Priority to TW086110814A priority patent/TW357386B/zh
Priority to US08/907,578 priority patent/US6653687B1/en
Priority to GB9717145A priority patent/GB2316227B/en
Priority to KR1019970039450A priority patent/KR100443437B1/ko
Publication of JPH1065164A publication Critical patent/JPH1065164A/ja
Publication of JPH1065164A5 publication Critical patent/JPH1065164A5/ja
Application granted granted Critical
Publication of JP3634086B2 publication Critical patent/JP3634086B2/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6757Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/014Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/026Manufacture or treatment of FETs having insulated gates [IGFET] having laterally-coplanar source and drain regions, a gate at the sides of the bulk channel, and both horizontal and vertical current flow
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213Channel regions of field-effect devices
    • H10D62/221Channel regions of field-effect devices of FETs
    • H10D62/235Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/299Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
JP23255396A 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置の作製方法 Expired - Fee Related JP3634086B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP23255396A JP3634086B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置の作製方法
TW086110814A TW357386B (en) 1996-08-13 1997-07-29 Insulating gate-type semiconductor and the manufacturing method
US08/907,578 US6653687B1 (en) 1996-08-13 1997-08-08 Insulated gate semiconductor device
GB9717145A GB2316227B (en) 1996-08-13 1997-08-12 Insulated gate semiconductor device and method of manufacturing the same
KR1019970039450A KR100443437B1 (ko) 1996-08-13 1997-08-13 절연게이트형반도체장치및그제작방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23255396A JP3634086B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JPH1065164A JPH1065164A (ja) 1998-03-06
JPH1065164A5 JPH1065164A5 (enExample) 2005-02-03
JP3634086B2 true JP3634086B2 (ja) 2005-03-30

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JP23255396A Expired - Fee Related JP3634086B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置の作製方法

Country Status (5)

Country Link
US (1) US6653687B1 (enExample)
JP (1) JP3634086B2 (enExample)
KR (1) KR100443437B1 (enExample)
GB (1) GB2316227B (enExample)
TW (1) TW357386B (enExample)

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JP3634086B2 (ja) 1996-08-13 2005-03-30 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置の作製方法
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
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JP4236722B2 (ja) 1998-02-05 2009-03-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
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JP5247468B2 (ja) 2005-12-30 2013-07-24 ニューロテック ユーエスエー, インコーポレイテッド 生物活性分子の送達のための微粒子化デバイスおよびその使用方法
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JP5897910B2 (ja) 2011-01-20 2016-04-06 株式会社半導体エネルギー研究所 半導体装置の作製方法
CN104640579A (zh) 2012-05-30 2015-05-20 神经技术美国有限公司 冷冻保存的可植入细胞培养装置及其用途
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EP3662923A1 (en) 2015-05-27 2020-06-10 Neurotech USA, Inc. Use of encapsulated cell therapy for treatment of ophthalmic disorders
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WO2022011081A1 (en) 2020-07-09 2022-01-13 The United States Of America, As Represented By The Secretary, Department Of Health And Human Services Cell lines that produce human retinoschisin proteins and uses thereof

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Also Published As

Publication number Publication date
KR19980018785A (ko) 1998-06-05
JPH1065164A (ja) 1998-03-06
TW357386B (en) 1999-05-01
KR100443437B1 (ko) 2004-10-14
GB9717145D0 (en) 1997-10-22
GB2316227A (en) 1998-02-18
US6653687B1 (en) 2003-11-25
GB2316227B (en) 2001-11-21

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