JP3117893B2 - 書込待ち時間制御機能を有する同期式メモリ装置 - Google Patents

書込待ち時間制御機能を有する同期式メモリ装置

Info

Publication number
JP3117893B2
JP3117893B2 JP07044668A JP4466895A JP3117893B2 JP 3117893 B2 JP3117893 B2 JP 3117893B2 JP 07044668 A JP07044668 A JP 07044668A JP 4466895 A JP4466895 A JP 4466895A JP 3117893 B2 JP3117893 B2 JP 3117893B2
Authority
JP
Japan
Prior art keywords
signal
write
column address
memory device
waiting time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP07044668A
Other languages
English (en)
Japanese (ja)
Other versions
JPH07254273A (ja
Inventor
哲佑 朴
始烈 李
鎬哲 李
賢淳 張
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH07254273A publication Critical patent/JPH07254273A/ja
Application granted granted Critical
Publication of JP3117893B2 publication Critical patent/JP3117893B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Dram (AREA)
JP07044668A 1994-03-03 1995-03-03 書込待ち時間制御機能を有する同期式メモリ装置 Expired - Lifetime JP3117893B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019940004127A KR0122099B1 (ko) 1994-03-03 1994-03-03 라이트레이턴시제어기능을 가진 동기식 반도체메모리장치
KR1994P4127 1994-03-03

Publications (2)

Publication Number Publication Date
JPH07254273A JPH07254273A (ja) 1995-10-03
JP3117893B2 true JP3117893B2 (ja) 2000-12-18

Family

ID=19378302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP07044668A Expired - Lifetime JP3117893B2 (ja) 1994-03-03 1995-03-03 書込待ち時間制御機能を有する同期式メモリ装置

Country Status (6)

Country Link
US (1) US5568445A (forum.php)
JP (1) JP3117893B2 (forum.php)
KR (1) KR0122099B1 (forum.php)
CN (1) CN1053285C (forum.php)
DE (1) DE19507562A1 (forum.php)
TW (1) TW265472B (forum.php)

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US6279116B1 (en) 1992-10-02 2001-08-21 Samsung Electronics Co., Ltd. Synchronous dynamic random access memory devices that utilize clock masking signals to control internal clock signal generation
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US5966724A (en) * 1996-01-11 1999-10-12 Micron Technology, Inc. Synchronous memory device with dual page and burst mode operations
US7681005B1 (en) 1996-01-11 2010-03-16 Micron Technology, Inc. Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation
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US6504548B2 (en) 1998-09-18 2003-01-07 Hitachi, Ltd. Data processing apparatus having DRAM incorporated therein
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KR100225947B1 (ko) * 1996-06-27 1999-10-15 김영환 라이트 리커버리 보장 회로
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US7103742B1 (en) 1997-12-03 2006-09-05 Micron Technology, Inc. Burst/pipelined edo memory device
US5973993A (en) * 1998-02-27 1999-10-26 Micron Technology, Inc. Semiconductor memory burst length count determination detector
JP2000048565A (ja) * 1998-07-29 2000-02-18 Mitsubishi Electric Corp 同期型半導体記憶装置
KR100359157B1 (ko) 1998-12-30 2003-01-24 주식회사 하이닉스반도체 라이트 명령어 레이턴시회로 및 그 제어방법
KR100311044B1 (ko) 1999-10-05 2001-10-18 윤종용 클럭 주파수에 따라 레이턴시 조절이 가능한 레이턴시 결정 회로 및 레이턴시 결정 방법
JP4421036B2 (ja) * 1999-11-17 2010-02-24 富士通マイクロエレクトロニクス株式会社 半導体記憶装置のデータ書き込み方法及び半導体記憶装置
KR20020014563A (ko) * 2000-08-18 2002-02-25 윤종용 반도체 메모리 장치
JP4651206B2 (ja) * 2001-02-21 2011-03-16 富士通セミコンダクター株式会社 半導体記憶装置および情報処理装置
US6545942B2 (en) * 2001-02-21 2003-04-08 Fujitsu Limited Semiconductor memory device and information processing unit
US8391039B2 (en) 2001-04-24 2013-03-05 Rambus Inc. Memory module with termination component
US6675272B2 (en) 2001-04-24 2004-01-06 Rambus Inc. Method and apparatus for coordinating memory operations among diversely-located memory components
JP2003257200A (ja) * 2002-03-01 2003-09-12 Mitsubishi Electric Corp 半導体記憶装置
JP2004069961A (ja) * 2002-08-06 2004-03-04 Seiko Epson Corp 半導体集積回路
DE10246790B4 (de) * 2002-10-08 2013-10-31 Qimonda Ag Integrierter Speicher
KR100539964B1 (ko) * 2003-06-27 2005-12-28 주식회사 하이닉스반도체 반도체 메모리 소자의 프리차지 장치 및 이를 이용한 프리차지 방법
US7225303B2 (en) * 2003-09-22 2007-05-29 Micron Technology, Inc. Method and apparatus for accessing a dynamic memory device by providing at least one of burst and latency information over at least one of redundant row and column address lines
KR100540472B1 (ko) * 2003-10-31 2006-01-11 주식회사 하이닉스반도체 데이터 출력에 관한 동작마진이 향상된 메모리 장치
US7301831B2 (en) 2004-09-15 2007-11-27 Rambus Inc. Memory systems with variable delays for write data signals
KR100624296B1 (ko) * 2004-11-08 2006-09-19 주식회사 하이닉스반도체 반도체 메모리 소자
US7293158B2 (en) * 2005-03-02 2007-11-06 International Business Machines Corporation Systems and methods for implementing counters in a network processor with cost effective memory
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
KR100615610B1 (ko) * 2005-08-11 2006-08-25 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 컬럼 인에이블 신호발생방법
JP4745782B2 (ja) * 2005-10-05 2011-08-10 エルピーダメモリ株式会社 半導体記憶装置
DE102007051839B4 (de) * 2007-10-30 2015-12-10 Polaris Innovations Ltd. Kontrollschaltung, Speichervorrichtung mit einer Kontrollschaltung und Verfahren zum Durchführen eines Schreibkommandos bzw. zum Betrieb einer Speichervorrichtung mit einer Kontrollschaltung
KR100945792B1 (ko) * 2008-03-12 2010-03-08 주식회사 하이닉스반도체 어드레스 제어 회로를 포함하는 반도체 집적 회로
KR101020290B1 (ko) * 2009-01-12 2011-03-07 주식회사 하이닉스반도체 버스트모드 제어회로
KR20110001396A (ko) * 2009-06-30 2011-01-06 삼성전자주식회사 전력 소모를 줄일 수 있는 반도체 메모리 장치
KR101145784B1 (ko) * 2010-10-11 2012-05-17 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그를 포함하는 메모리 시스템
KR101143487B1 (ko) * 2010-10-29 2012-05-15 에스케이하이닉스 주식회사 반도체 메모리 장치의
JP2013089030A (ja) * 2011-10-18 2013-05-13 Elpida Memory Inc 情報処理システム、制御システム及び半導体装置

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JPS63276795A (ja) * 1986-12-16 1988-11-15 Mitsubishi Electric Corp 可変長シフトレジスタ
KR100214435B1 (ko) * 1990-07-25 1999-08-02 사와무라 시코 동기식 버스트 엑세스 메모리
JP2740063B2 (ja) * 1990-10-15 1998-04-15 株式会社東芝 半導体記憶装置
JP2605576B2 (ja) * 1993-04-02 1997-04-30 日本電気株式会社 同期型半導体メモリ
US5386385A (en) * 1994-01-31 1995-01-31 Texas Instruments Inc. Method and apparatus for preventing invalid operating modes and an application to synchronous memory devices

Also Published As

Publication number Publication date
CN1117642A (zh) 1996-02-28
KR0122099B1 (ko) 1997-11-26
US5568445A (en) 1996-10-22
CN1053285C (zh) 2000-06-07
DE19507562A1 (de) 1995-09-07
TW265472B (forum.php) 1995-12-11
JPH07254273A (ja) 1995-10-03

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