JP2015019065A - イオン加速器を備えるデュアルチャンバプラズマエッチング装置 - Google Patents
イオン加速器を備えるデュアルチャンバプラズマエッチング装置 Download PDFInfo
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- JP2015019065A JP2015019065A JP2014138340A JP2014138340A JP2015019065A JP 2015019065 A JP2015019065 A JP 2015019065A JP 2014138340 A JP2014138340 A JP 2014138340A JP 2014138340 A JP2014138340 A JP 2014138340A JP 2015019065 A JP2015019065 A JP 2015019065A
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Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32357—Generation remote from the workpiece, e.g. down-stream
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- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32422—Arrangement for selecting ions or species in the plasma
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- H01J37/32431—Constructional details of the reactor
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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Abstract
【解決手段】処理装置100は、グリッドアセンブリ107によって上側サブチャンバ101と下側サブチャンバ103とに分割される。プラズマは、上側サブチャンバ内で発生され、基板113は、下側サブチャンバ内に位置決めされる。グリッドアセンブリは、少なくとも2つのグリッド105、106を含み、各グリッドは、特定の種を通過させる穿孔を含む。最上部グリッド105は、電子を反発するように負にバイアスされる。最下部グリッド106は、上側サブチャンバから下側サブチャンバに正イオンを加速させるために、最上部グリッドに比べてさらに大きな負の値にバイアスされる。エッチングガスは、下側サブチャンバに直接供給される。エッチングガスおよびイオンは、基板の表面と反応して、望み通りに基板をエッチングする。
【選択図】図1
Description
図2は、本明細書における様々な実施形態に従って材料をエッチングするためのフローチャートを提供する。プロセス200は、ブロック202から始まり、ブロック202では、除去すべき材料を上に有する基板が、反応チャンバ内に受領される(受け取られる)。上述したように、反応チャンバは、グリッドアセンブリによって上側サブチャンバと下側サブチャンバとに分割される。基板は、下側サブチャンバ内において受け取られ、典型的には、静電チャックなど基板ホルダ上に位置決めされる。ブロック204では、上側サブチャンバ内でプラズマが発生される。グリッドアセンブリの存在により、プラズマは、概して上側サブチャンバに閉じ込められ、下側サブチャンバ内には実質的にまたは全く広がらない。しかし、以下に説明するように、プラズマ中の正イオンやラジカルなど特定の種は、グリッドを通過し、下側サブチャンバに達して基板と相互作用することができる。
本明細書で述べる方法は、適切な負のバイアスをサポートする少なくとも2つのグリッドを有する任意の適切なプラズマエッチング装置によって行うことができる。適切な装置は、本明細書で述べるようなエッチング条件を提供して維持するためのチャンバおよび電子的ハードウェアを含む。また、適切な装置は、時として、上述したようなハードウェアに指令するための命令、およびエッチング用途に適した一連のプロセス操作を行うため(例えば、MRAM構造またはFETのゲート電極をエッチングするため)の命令を有する制御装置を含む。いくつかの実施形態では、装置は、プロセスツールに含まれる1つまたは複数のプロセスステーションを含むことがある。
Claims (24)
- 基板をエッチングする方法であって、
(a)その上に除去すべき材料を有する基板をリアクタの反応チャンバ内において受け取り、前記リアクタは、
(i)上側サブチャンバおよび下側サブチャンバと、
(ii)グリッドアセンブリと、を備え、前記グリッドアセンブリは、前記反応チャンバ内に位置決めされ、これにより前記反応チャンバは前記上側サブチャンバと前記下側サブチャンバに分割され、前記グリッドアセンブリは、少なくとも最上部グリッドと最下部グリッドとを備え、前記最上部グリッドおよび最下部グリッドは、前記グリッドに負のバイアスを個別に提供するための1つまたは複数の電源に接続され、前記グリッドアセンブリの各グリッドは、前記グリッドの厚さを貫通して延びる穿孔を有し、
(iii)前記上側サブチャンバへの1つまたは複数の入口と、
(iv)前記下側サブチャンバへの1つまたは複数の入口と、
(v)前記上側サブチャンバ内でプラズマを発生させるように設計または構成されているプラズマ発生源と
を備え、
(b)前記上側サブチャンバにプラズマ発生ガスを供給し、前記プラズマ発生ガスからプラズマを発生させ、
(c)前記最下部グリッドに印加されるバイアスが、前記最上部グリッドに印加されるバイアスよりも大きい負の値であるように、前記グリッドアセンブリの少なくとも前記最上部グリッドおよび最下部グリッドに負のバイアスを印加し、
(d)前記下側サブチャンバへの前記1つまたは複数の入口を通して、前記下側サブチャンバにエッチングガスを供給し、
(e)前記基板をエッチングして、前記除去すべき材料の少なくとも一部を除去すること
を備え、
前記下側サブチャンバは、操作(a)〜(e)中にプラズマを実質的に含まない
方法。 - 前記最上部グリッドに印加されるバイアスは、約−0.5〜−50Vの間である請求項1に記載の方法。
- 前記最下部グリッドに印加されるバイアスは、約−0.5〜−2000Vの間である請求項1に記載の方法。
- 請求項1に記載の方法は、さらに、操作(c)中に、前記グリッドアセンブリの少なくとも1つのグリッドに印加される前記バイアスを変えることを備える、方法。
- 操作(d)中の前記エッチングガスは、パルスで供給される請求項1に記載の方法。
- 前記プラズマ発生ガスは、不活性ガスを含む請求項1に記載の方法。
- 前記プラズマ発生ガスは、反応性ガスを含む請求項1に記載の方法。
- 前記除去すべき材料は、Fe、Mn、Ni、Mg、Pt、Pd、Co、Ru、Cu、Ir、およびそれらの組合せからなる群から選択される請求項1に記載の方法。
- 請求項1に記載の方法は、さらに、処理ガスを前記下側サブチャンバに供給し、前記処理ガスを前記除去すべき材料と反応させ、酸化物、窒化物、水素化物、塩化物、フッ化物、有機金属錯体、またはそれらの組合せからなる群から選択される材料を含む除去すべき反応層を形成することを備える、方法。
- 請求項9に記載の方法は、さらに、除去すべき前記反応層を除去するために、除去すべき前記反応層を前記エッチングガスと反応させることを備える、方法。
- 請求項1に記載の方法は、さらに、操作(b)〜(e)の少なくとも1つにおいて、前記グリッドアセンブリの少なくとも1つのグリッドを移動させることを備える方法。
- 前記上側サブアセンブリ中に存在するイオンは、前記グリッドアセンブリを通って加速し、前記基板の表面と相互作用する請求項1に記載の方法。
- 基板をエッチングする方法であって、
(a)プラズマリアクタの上側領域内でプラズマを発生させ、
(b)前記プラズマからのイオンを、前記プラズマリアクタの下側領域内の前記基板の表面上に向けて加速させ、前記プラズマは前記基板に接触せず、
(c)前記基板の表面にエッチャントガスを送給するステップであって、前記エッチャントガスは表面と反応して、前記表面から前記金属または半導体をエッチングし、前記金属または半導体の1つまたは複数の原子と、前記エッチャントガスからの1つまたは複数の配位子とを含む揮発性副生成物を生成し、
(d)前記副生成物を前記プラズマに実質的に接触させることなく、かつ前記揮発性副生成物をより揮発性の低い物質に解離させることなく、前記プラズマリアクタから前記揮発性副生成物を除去すること
を備える方法。 - 請求項13に記載の方法において、前記イオンを加速することは、前記プラズマリアクタの前記上側領域と下側領域を分離する1つまたは複数のグリッドに負のバイアスを印加することを備える、方法。
- 請求項13に記載の方法において、(c)において前記エッチャントガスは、反応して、Fe、Mn、Ni、Mg、Pt、Pd、Co、Ru、Cu、Ir、およびそれらの組合せからなる群から選択される金属をエッチングする、方法。
- 基板をエッチングするための装置であって、
(a)反応チャンバと、
(b)グリッドアセンブリとを備え、前記グリッドアセンブリは、前記反応チャンバ内に位置決めされ、これにより前記反応チャンバを上側サブチャンバと下側サブチャンバに分割し、前記グリッドアセンブリは、少なくとも最上部グリッドと最下部グリッドとを備え、前記グリッドアセンブリ内の各グリッドは、前記グリッドの厚さを貫通して延びる穿孔を有し、
(c)前記最上部グリッドおよび最下部グリッドに負のバイアスを個別に提供するための、前記グリッドアセンブリの少なくとも前記最上部グリッドおよび最下部グリッドとの電気接続ラインと、
(d)前記上側サブチャンバへの1つまたは複数のガス入口と、
(e)前記下側サブチャンバへの1つまたは複数のガス入口と、
(f)前記上側サブチャンバ内でプラズマを発生させるように設計または構成されているプラズマ発生源と、
(g)前記下側サブチャンバからガスを除去するように設計または構成されている、前記下側サブチャンバへの1つまたは複数のガス出口と、
(h)命令を提供するように設計または構成されている制御装置と
を備え、前記命令は、
(i)前記上側サブチャンバにプラズマ発生ガスを供給し、前記プラズマ発生ガスからプラズマを発生させるための命令、
(ii)前記最下部グリッドに印加されるバイアスは、前記最上部グリッドに印加されるバイアスよりも大きい負の値であるように、前記グリッドアセンブリの少なくとも前記最上部グリッドおよび最下部グリッドに負のバイアスを印加するための命令、
(iii)前記下側サブチャンバにエッチングガスを供給するための命令、である装置。 - 請求項16に記載の装置において、前記グリッドアセンブリは、(c)および(d)での前記入口の1つまたは複数として働くように設計または構成されている、装置。
- 請求項16に記載の装置において、前記上側サブチャンバの高さと前記下側サブチャンバの高さとの比が、約0.1〜10の間である、装置。
- 請求項16に記載の装置において、前記グリッドアセンブリは、基板表面の異なる部分に異なるレベルのイオンフラックスを提供するように設計されている、装置。
- 請求項16に記載の装置において、前記グリッドアセンブリは、前記アセンブリに埋め込まれた冷却チャネルを備えている、装置。
- 請求項16に記載の装置において、前記グリッドアセンブリの少なくとも1つのグリッドは可動である、装置。
- 請求項16に記載の装置において、前記プラズマ発生源は、前記上側サブチャンバの上方に位置決めされた1つまたは複数のプラズマコイルを備えている、装置。
- 請求項16に記載の装置は、前記プラズマ発生源は、容量結合プラズマ源である、装置。
- 請求項16に記載の装置において、前記グリッドアセンブリは、3つ以上のグリッドを備えている、装置。
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US11004661B2 (en) | 2015-09-04 | 2021-05-11 | Applied Materials, Inc. | Process chamber for cyclic and selective material removal and etching |
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JP2019169724A (ja) * | 2019-05-08 | 2019-10-03 | 東京エレクトロン株式会社 | エッチング方法及びエッチング装置 |
KR20220058633A (ko) * | 2019-09-19 | 2022-05-09 | 어플라이드 머티어리얼스, 인코포레이티드 | 금속들의 원자 층 에칭 |
JP2022549244A (ja) * | 2019-09-19 | 2022-11-24 | アプライド マテリアルズ インコーポレイテッド | 金属の原子層エッチング |
KR102584970B1 (ko) | 2019-09-19 | 2023-10-04 | 어플라이드 머티어리얼스, 인코포레이티드 | 금속들의 원자 층 에칭 |
JP7357778B2 (ja) | 2019-09-19 | 2023-10-06 | アプライド マテリアルズ インコーポレイテッド | 金属の原子層エッチング |
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WO2022230072A1 (ja) * | 2021-04-27 | 2022-11-03 | 東京エレクトロン株式会社 | 成膜装置 |
Also Published As
Publication number | Publication date |
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US10134605B2 (en) | 2018-11-20 |
KR20150007993A (ko) | 2015-01-21 |
CN107068559A (zh) | 2017-08-18 |
US9147581B2 (en) | 2015-09-29 |
CN104282522A (zh) | 2015-01-14 |
CN107068559B (zh) | 2020-09-04 |
TWI647757B (zh) | 2019-01-11 |
CN104282522B (zh) | 2017-01-18 |
US20150364349A1 (en) | 2015-12-17 |
US9431269B2 (en) | 2016-08-30 |
JP6475430B2 (ja) | 2019-02-27 |
TW201519311A (zh) | 2015-05-16 |
KR102279670B1 (ko) | 2021-07-20 |
SG10201403999YA (en) | 2015-02-27 |
US20150364339A1 (en) | 2015-12-17 |
US20150017810A1 (en) | 2015-01-15 |
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