JP2014209544A - 半導体装置とその製造方法 - Google Patents
半導体装置とその製造方法 Download PDFInfo
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- JP2014209544A JP2014209544A JP2013258043A JP2013258043A JP2014209544A JP 2014209544 A JP2014209544 A JP 2014209544A JP 2013258043 A JP2013258043 A JP 2013258043A JP 2013258043 A JP2013258043 A JP 2013258043A JP 2014209544 A JP2014209544 A JP 2014209544A
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
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- Engineering & Computer Science (AREA)
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- Power Engineering (AREA)
- Computer Hardware Design (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (6)
- 配線基板と、前記配線基板上に搭載された半導体素子と、前記半導体素子を封止するモールド樹脂と、前記モールド樹脂上に設けられたシールド層とを備えた半導体装置であって、
前記モールド樹脂は表面にレーザ照射によるマーキングを有しており、このマーキングを備えたモールド樹脂上に前記シールド層が設けられ、
前記半導体素子に接続されたグランドワイヤ及び信号線ワイヤを具備し、
前記グランドワイヤは少なくともその一部が前記シールド層と接触しており、
前記グランドワイヤのループ頂部が前記信号線ワイヤのループ頂部より高位に位置していることを特徴とする半導体装置。 - 配線基板と、前記配線基板上に搭載された半導体素子と、前記半導体素子を封止するモールド樹脂と、前記モールド樹脂上に設けられたシールド層とを備え、前記モールド樹脂は表面にレーザ照射によるマーキングを有しており、このマーキングを備えたモールド樹脂上に前記シールド層が設けられていることを特徴とする半導体装置。
- 前記半導体素子に接続されたグランドワイヤ及び信号線ワイヤを具備し、前記グランドワイヤは少なくともその一部が前記シールド層と接触していることを特徴とする請求項2記載の半導体装置。
- 配線基板上に半導体素子を搭載する工程と、
前記半導体素子をモールド樹脂で封止する工程と、
前記モールド樹脂の表面にレーザ照射によりマーキングを施す工程と、
前記マーキングが施されたモールド樹脂表面にシールド層を形成する工程と
を具備することを特徴とする半導体装置の製造方法。 - 前記マーキング工程は、前記モールド樹脂の表面を粗化する工程を含むことを特徴とする請求項4記載の半導体装置の製造方法。
- 前記マーキング工程において、前記モールド樹脂を介して前記素子に接続されたグランドワイヤの位置を確認し、この確認した位置に基づいて前記モールド樹脂の表面にマーキングを施すことを特徴とする請求項4または5記載の半導体装置の製造方法。
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