JP2013521661A - プロセス均一性及び熱消散を改善するダミーｔｓｖ（スルーシリコンビア） - Google Patents

プロセス均一性及び熱消散を改善するダミーｔｓｖ（スルーシリコンビア） Download PDF

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Publication number
JP2013521661A
JP2013521661A JP2012556238A JP2012556238A JP2013521661A JP 2013521661 A JP2013521661 A JP 2013521661A JP 2012556238 A JP2012556238 A JP 2012556238A JP 2012556238 A JP2012556238 A JP 2012556238A JP 2013521661 A JP2013521661 A JP 2013521661A
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silicon via
wafer substrate
conductive
active circuit
openings
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Japanese (ja)
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パーク チャンヨック
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/231—Configurations of stacked chips the stacked chips being on both top and bottom sides of an auxiliary carrier having no electrical connection structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/26—Configurations of stacked chips the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Semiconductor Memories (AREA)
JP2012556238A 2010-03-03 2011-03-03 プロセス均一性及び熱消散を改善するダミーｔｓｖ（スルーシリコンビア） Pending JP2013521661A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/716,902 US10181454B2 (en) 2010-03-03 2010-03-03 Dummy TSV to improve process uniformity and heat dissipation
US12/716,902 2010-03-03
PCT/US2011/026987 WO2011109595A1 (en) 2010-03-03 2011-03-03 Dummy tsv to improve process uniformity and heat dissipation

Related Child Applications (1)

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JP2016239334A Division JP6412091B2 (ja) 2010-03-03 2016-12-09 プロセス均一性及び熱消散を改善するダミーｔｓｖ（スルーシリコンビア）

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JP2013521661A true JP2013521661A (ja) 2013-06-10

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JP2012556238A Pending JP2013521661A (ja) 2010-03-03 2011-03-03 プロセス均一性及び熱消散を改善するダミーｔｓｖ（スルーシリコンビア）
JP2016239334A Active JP6412091B2 (ja) 2010-03-03 2016-12-09 プロセス均一性及び熱消散を改善するダミーｔｓｖ（スルーシリコンビア）

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Country Status (7)

Country Link
US (2) US10181454B2 (https=)
EP (1) EP2543067B1 (https=)
JP (2) JP2013521661A (https=)
KR (1) KR101870931B1 (https=)
CN (1) CN102782841B (https=)
TW (1) TWI562277B (https=)
WO (1) WO2011109595A1 (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190104620A (ko) 2017-03-21 2019-09-10 후지필름 가부시키가이샤 적층 디바이스, 적층체 및 적층 디바이스의 제조 방법
US10847615B2 (en) 2018-09-20 2020-11-24 Kabushiki Kaisha Toshiba Semiconductor device
WO2022181064A1 (ja) * 2021-02-25 2022-09-01 ソニーセミコンダクタソリューションズ株式会社 半導体装置、撮像装置、製造方法

Families Citing this family (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8563365B2 (en) * 2011-03-09 2013-10-22 Georgia Tech Research Corporation Air-gap C4 fluidic I/O interconnects and methods of fabricating same
US8618647B2 (en) * 2011-08-01 2013-12-31 Tessera, Inc. Packaged microelectronic elements having blind vias for heat dissipation
US9633149B2 (en) * 2012-03-14 2017-04-25 Taiwan Semiconductor Manufacturing Co., Ltd. System and method for modeling through silicon via
US9147610B2 (en) 2012-06-22 2015-09-29 Infineon Technologies Ag Monitor structures and methods of formation thereof
US9343393B2 (en) 2012-08-15 2016-05-17 Industrial Technology Research Institute Semiconductor substrate assembly with embedded resistance element
TWI497661B (zh) 2012-08-15 2015-08-21 財團法人工業技術研究院 半導體基板
KR20140023707A (ko) * 2012-08-17 2014-02-27 에스케이하이닉스 주식회사 얼라인 키 구조물을 포함한 반도체 메모리 장치
CN103633039B (zh) * 2012-08-29 2017-02-08 中芯国际集成电路制造(上海)有限公司 半导体散热结构及其形成方法、半导体芯片
US9058460B2 (en) 2013-03-01 2015-06-16 International Business Machines Corporation Thermally-optimized metal fill for stacked chip systems
CN103236420B (zh) * 2013-04-28 2015-12-23 华进半导体封装先导技术研发中心有限公司 三维封装中散热通道与地线通道共用的封装结构
KR101428754B1 (ko) * 2013-05-14 2014-08-11 (주)실리콘화일 방열 특성이 개선된 반도체 장치
KR102144734B1 (ko) * 2013-10-25 2020-08-14 삼성전자 주식회사 반도체 장치 제조 방법
US9627341B2 (en) * 2013-10-28 2017-04-18 Infineon Technologies Dresden Gmbh Wafer arrangement, a method for testing a wafer, and a method for processing a wafer
KR20150094135A (ko) * 2014-02-10 2015-08-19 삼성전자주식회사 반도체 패키지 및 이의 제조방법
US9368479B2 (en) 2014-03-07 2016-06-14 Invensas Corporation Thermal vias disposed in a substrate proximate to a well thereof
US9178495B2 (en) 2014-03-21 2015-11-03 Globalfoundries U.S. 2 Llc Establishing a thermal profile across a semiconductor chip
KR20150118638A (ko) 2014-04-14 2015-10-23 에스케이하이닉스 주식회사 이미지 센서 및 그 제조 방법
US9831214B2 (en) * 2014-06-18 2017-11-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device packages, packaging methods, and packaged semiconductor devices
US10177032B2 (en) * 2014-06-18 2019-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Devices, packaging devices, and methods of packaging semiconductor devices
US9646918B2 (en) 2014-08-14 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
KR102352677B1 (ko) 2014-08-27 2022-01-17 삼성전자주식회사 반도체 장치 및 그 제조 방법
CN106033754B (zh) * 2015-03-11 2019-04-12 联华电子股份有限公司 具有纳米孔隙的半导体元件及其制造方法
CN104966693B (zh) * 2015-06-03 2017-03-15 贵州大学 一种内嵌式复合散热结构的三维集成功率系统及制备方法
US9960150B2 (en) * 2016-06-13 2018-05-01 Micron Technology, Inc. Semiconductor device assembly with through-mold cooling channel formed in encapsulant
US10296698B2 (en) * 2016-12-14 2019-05-21 Globalfoundries Inc. Forming multi-sized through-silicon-via (TSV) structures
EP4016718A1 (en) 2017-02-10 2022-06-22 Sony Group Corporation Battery and connection apparatus
US10290676B2 (en) 2017-08-15 2019-05-14 Northrop Grumman Systems Corporation Superconducting device with thermally conductive heat sink
CN107731839B (zh) * 2017-08-23 2019-03-19 长江存储科技有限责任公司 一种3d nand闪存结构及其制作方法
US10461014B2 (en) 2017-08-31 2019-10-29 Taiwan Semiconductor Manufacturing Company, Ltd. Heat spreading device and method
US10229864B1 (en) * 2017-09-14 2019-03-12 Northrop Grumman Systems Corporation Cryogenic integrated circuit having a heat sink coupled to separate ground planes through differently sized thermal vias
US10629535B2 (en) * 2017-10-31 2020-04-21 Northrop Grumman Systems Corporation Thermally isolated ground planes with a superconducting electrical coupler
US10685905B2 (en) 2018-01-24 2020-06-16 Toyota Motor Engineering & Manufacturing North America, Inc. Multi-layer cooling structure including through-silicon vias through a plurality of directly-bonded substrates and methods of making the same
US10157817B1 (en) 2018-01-26 2018-12-18 Toyota Motor Engineering & Manufacturing North America, Inc. Chip-scale cooling device having through-silicon vias and flow directing features
US10510629B2 (en) * 2018-05-18 2019-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and method of forming same
US10867962B2 (en) * 2018-06-29 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging process and manufacturing method
US11205620B2 (en) 2018-09-18 2021-12-21 International Business Machines Corporation Method and apparatus for supplying power to VLSI silicon chips
CN118921987A (zh) * 2018-09-28 2024-11-08 长江存储科技有限责任公司 3d存储器件
US11004763B2 (en) * 2018-12-20 2021-05-11 Northrop Grumman Systems Corporation Superconducting device with multiple thermal sinks
CN110299348A (zh) * 2019-07-02 2019-10-01 贵州大学 一种大功率同步整流器结构的三维集成方法
US11275111B2 (en) * 2019-09-20 2022-03-15 Micron Technology, Inc. Plurality of edge through-silicon vias and related systems, methods, and devices
CN113035801A (zh) * 2019-12-25 2021-06-25 台湾积体电路制造股份有限公司 存储器装置及其制造方法
US11522118B2 (en) 2020-01-09 2022-12-06 Northrop Grumman Systems Corporation Superconductor structure with normal metal connection to a resistor and method of making the same
CN113113367A (zh) * 2020-01-13 2021-07-13 华为技术有限公司 芯片、芯片的制造方法和电子设备
US11004833B1 (en) * 2020-02-17 2021-05-11 Xilinx, Inc. Multi-chip stacked devices
US11043469B1 (en) * 2020-02-19 2021-06-22 Nanya Technology Corporation Method of forming three dimensional semiconductor structure
KR102802189B1 (ko) 2020-05-04 2025-04-30 삼성전자주식회사 반도체 패키지
US11923150B2 (en) 2020-05-27 2024-03-05 Intel Corporation Decoupling capacitors based on dummy through-silicon-vias
CN113964091A (zh) * 2020-07-20 2022-01-21 长鑫存储技术有限公司 半导体装置及其制备方法、三维集成电路
CN112435559B (zh) * 2020-11-15 2022-07-15 北京航空航天大学 一种内嵌可拉伸电路的暖体假人制作方法及暖体假人
WO2022126017A2 (en) * 2020-12-11 2022-06-16 Qorvo Us, Inc. 3d packaging with silicon die as thermal sink for high- power low thermal conductivity dies
US11574891B2 (en) * 2021-01-26 2023-02-07 Nanya Technology Corporation Semiconductor device with heat dissipation unit and method for fabricating the same
US12402331B2 (en) 2021-02-09 2025-08-26 Intel Corporation Decoupling capacitors based on dummy through-silicon-via plates
US11984376B2 (en) * 2021-04-22 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Stacked semiconductor device including a cooling structure
CN114093810A (zh) * 2021-10-19 2022-02-25 芯盟科技有限公司 芯片及其设计方法
US12593672B2 (en) * 2022-02-17 2026-03-31 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit package and method
US12456630B2 (en) * 2022-07-05 2025-10-28 Nanya Technology Corporation Method of manufacturing semiconductor structure having heat dissipation structure
US12315774B2 (en) * 2022-07-05 2025-05-27 Nanya Technology Corporation Semiconductor structure having heat dissipation structure
KR20240100035A (ko) * 2022-12-22 2024-07-01 삼성전자주식회사 반도체 장치
US12550340B2 (en) 2023-06-12 2026-02-10 Intel Corporation Three-dimensional metal-insulator-metal capacitors
US12610565B2 (en) 2023-06-13 2026-04-21 Intel Corporation Three-dimensional interlocked corrugated capacitor structures
US20250118706A1 (en) * 2023-10-05 2025-04-10 Advanced Micro Devices, Inc. Chip package with a thermal carrier
TWI880636B (zh) * 2024-02-17 2025-04-11 力晶積成電子製造股份有限公司 具有矽穿孔的散熱結構及其製作方法
US20250364349A1 (en) * 2024-05-23 2025-11-27 Applied Materials, Inc. Dummy features for dissipating heat in packages including advanced semiconductor chips
TWI880774B (zh) * 2024-06-07 2025-04-11 華邦電子股份有限公司 半導體裝置及其檢測方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01295455A (ja) * 1988-05-24 1989-11-29 Matsushita Electric Ind Co Ltd 半導体積層集積回路素子
JP2006245311A (ja) * 2005-03-03 2006-09-14 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
WO2008108334A1 (ja) * 2007-03-06 2008-09-12 Nikon Corporation 半導体装置及び該半導体装置の製造方法
JP2009246258A (ja) * 2008-03-31 2009-10-22 Nikon Corp 半導体装置および製造方法
JP2010021451A (ja) * 2008-07-14 2010-01-28 Panasonic Corp 固体撮像装置およびその製造方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3309907B2 (ja) 1999-04-20 2002-07-29 日本電気株式会社 半導体装置及びその製造方法
US20020163072A1 (en) * 2001-05-01 2002-11-07 Subhash Gupta Method for bonding wafers to produce stacked integrated circuits
JP3817453B2 (ja) * 2001-09-25 2006-09-06 新光電気工業株式会社 半導体装置
JP4869546B2 (ja) * 2003-05-23 2012-02-08 ルネサスエレクトロニクス株式会社 半導体装置
JP4342866B2 (ja) 2003-08-08 2009-10-14 竹本油脂株式会社 積層フィルム
JP4556454B2 (ja) 2004-03-15 2010-10-06 パナソニック電工株式会社 半導体装置の製造方法
US7202419B2 (en) 2004-07-20 2007-04-10 Dragonwave Inc. Multi-layer integrated RF/IF circuit board including a central non-conductive layer
US20060220227A1 (en) 2005-04-04 2006-10-05 Data Device Corporation High density integrated circuit having multiple chips and employing a ball grid array (BGA) and method for making same
US7432592B2 (en) 2005-10-13 2008-10-07 Intel Corporation Integrated micro-channels for 3D through silicon architectures
KR100874910B1 (ko) * 2006-10-30 2008-12-19 삼성전자주식회사 수직형 열방출 통로를 갖는 적층형 반도체 패키지 및 그제조방법
JP4750724B2 (ja) 2007-01-25 2011-08-17 東京応化工業株式会社 重ね合わせユニット及び貼り合わせ装置
US7598523B2 (en) 2007-03-19 2009-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Test structures for stacking dies having through-silicon vias
KR101348748B1 (ko) * 2007-08-24 2014-01-08 삼성전자주식회사 재배선 기판을 이용한 반도체 패키지 제조방법
US7592697B2 (en) 2007-08-27 2009-09-22 Intel Corporation Microelectronic package and method of cooling same
US7738249B2 (en) 2007-10-25 2010-06-15 Endicott Interconnect Technologies, Inc. Circuitized substrate with internal cooling structure and electrical assembly utilizing same
US20090160531A1 (en) 2007-12-20 2009-06-25 Ati Technologies Ulc Multi-threshold voltage-biased circuits
KR101420817B1 (ko) 2008-01-15 2014-07-21 삼성전자주식회사 3 차원의 직렬 및 병렬 회로들을 가지고 차례로 적층된집적회로 모듈들을 전기적으로 접속하는 반도체 집적회로장치 및 그 장치의 형성방법
US7893529B2 (en) * 2009-01-12 2011-02-22 International Business Machines Corporation Thermoelectric 3D cooling
US8314483B2 (en) * 2009-01-26 2012-11-20 Taiwan Semiconductor Manufacturing Company, Ltd. On-chip heat spreader
US8526186B2 (en) * 2011-07-11 2013-09-03 Texas Instruments Incorporated Electronic assembly including die on substrate with heat spreader having an open window on the die
US9472483B2 (en) * 2014-12-17 2016-10-18 International Business Machines Corporation Integrated circuit cooling apparatus
WO2020000005A1 (de) 2018-06-26 2020-01-02 Pankowski Irina Teleskopartig zusammenschiebbares trinkgefäss sowie hand- und transportschutz für das trinkgefäss

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01295455A (ja) * 1988-05-24 1989-11-29 Matsushita Electric Ind Co Ltd 半導体積層集積回路素子
JP2006245311A (ja) * 2005-03-03 2006-09-14 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
WO2008108334A1 (ja) * 2007-03-06 2008-09-12 Nikon Corporation 半導体装置及び該半導体装置の製造方法
JP2009246258A (ja) * 2008-03-31 2009-10-22 Nikon Corp 半導体装置および製造方法
JP2010021451A (ja) * 2008-07-14 2010-01-28 Panasonic Corp 固体撮像装置およびその製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190104620A (ko) 2017-03-21 2019-09-10 후지필름 가부시키가이샤 적층 디바이스, 적층체 및 적층 디바이스의 제조 방법
US11011499B2 (en) 2017-03-21 2021-05-18 Fujifilm Corporation Stacked device, stacked structure, and method of manufacturing stacked device
US10847615B2 (en) 2018-09-20 2020-11-24 Kabushiki Kaisha Toshiba Semiconductor device
WO2022181064A1 (ja) * 2021-02-25 2022-09-01 ソニーセミコンダクタソリューションズ株式会社 半導体装置、撮像装置、製造方法

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US20110215457A1 (en) 2011-09-08
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