JP2013069807A - 半導体パッケージ及びその製造方法 - Google Patents
半導体パッケージ及びその製造方法 Download PDFInfo
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- JP2013069807A JP2013069807A JP2011206549A JP2011206549A JP2013069807A JP 2013069807 A JP2013069807 A JP 2013069807A JP 2011206549 A JP2011206549 A JP 2011206549A JP 2011206549 A JP2011206549 A JP 2011206549A JP 2013069807 A JP2013069807 A JP 2013069807A
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- insulating layer
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- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
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Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
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| JP2011206549A JP2013069807A (ja) | 2011-09-21 | 2011-09-21 | 半導体パッケージ及びその製造方法 |
| US13/607,906 US9136220B2 (en) | 2011-09-21 | 2012-09-10 | Semiconductor package and method for manufacturing the semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011206549A JP2013069807A (ja) | 2011-09-21 | 2011-09-21 | 半導体パッケージ及びその製造方法 |
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| JP2013069807A true JP2013069807A (ja) | 2013-04-18 |
| JP2013069807A5 JP2013069807A5 (enExample) | 2014-09-04 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018085452A (ja) * | 2016-11-24 | 2018-05-31 | 株式会社ジェイデバイス | 半導体装置及びその製造方法 |
| JP2021520652A (ja) * | 2018-05-18 | 2021-08-19 | ロジャーズ ジャーマニー ゲーエムベーハーRogers Germany GmbH | 電子モジュールとその製造方法 |
| JP2023133675A (ja) * | 2022-03-14 | 2023-09-27 | 住友電気工業株式会社 | 高周波装置の製造方法 |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20150025129A (ko) * | 2013-08-28 | 2015-03-10 | 삼성전기주식회사 | 전자 소자 모듈 및 그 제조 방법 |
| US20150279815A1 (en) * | 2014-03-28 | 2015-10-01 | Stats Chippac, Ltd. | Semiconductor Device and Method of Forming Substrate Having Conductive Columns |
| US10115648B2 (en) * | 2015-11-23 | 2018-10-30 | Samsung Electro-Mechanics Co., Ltd. | Fan-out semiconductor package and electronic device including the same |
| US10068853B2 (en) * | 2016-05-05 | 2018-09-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated fan-out package and method of fabricating the same |
| TWI751331B (zh) * | 2017-05-10 | 2022-01-01 | 日商三井化學股份有限公司 | 半導體裝置的製造方法以及半導體裝置的中間體 |
| US11705414B2 (en) * | 2017-10-05 | 2023-07-18 | Texas Instruments Incorporated | Structure and method for semiconductor packaging |
| US11101186B2 (en) * | 2018-03-16 | 2021-08-24 | Advanced Semiconductor Engineering, Inc. | Substrate structure having pad portions |
| CN109801894A (zh) * | 2018-12-28 | 2019-05-24 | 华进半导体封装先导技术研发中心有限公司 | 芯片封装结构和封装方法 |
| US11257747B2 (en) * | 2019-04-12 | 2022-02-22 | Powertech Technology Inc. | Semiconductor package with conductive via in encapsulation connecting to conductive element |
| US11139179B2 (en) * | 2019-09-09 | 2021-10-05 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure and manufacturing method thereof |
| US11939212B2 (en) | 2019-12-23 | 2024-03-26 | Industrial Technology Research Institute | MEMS device, manufacturing method of the same, and integrated MEMS module using the same |
| US11365117B2 (en) | 2019-12-23 | 2022-06-21 | Industrial Technology Research Institute | MEMS device and manufacturing method of the same |
| TWI819644B (zh) * | 2022-06-07 | 2023-10-21 | 華東科技股份有限公司 | 增進打線接合承受力之晶片封裝的凸塊結構 |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001156246A (ja) * | 1999-11-25 | 2001-06-08 | Nec Corp | 集積回路チップの実装構造および実装方法 |
| JP2008300854A (ja) * | 2008-07-02 | 2008-12-11 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2009038259A (ja) * | 2007-08-02 | 2009-02-19 | Sony Corp | 半導体モジュール及びその製造方法 |
| JP2010186847A (ja) * | 2009-02-12 | 2010-08-26 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法、並びに電子装置 |
| JP2011014944A (ja) * | 2004-12-01 | 2011-01-20 | Shinko Electric Ind Co Ltd | 電子部品実装構造体の製造方法 |
| JP2011018893A (ja) * | 2009-07-08 | 2011-01-27 | Samsung Electro-Mechanics Co Ltd | 絶縁体、電子素子内蔵型印刷回路基板、及び電子素子内蔵型印刷回路基板の製造方法 |
| JP2011060875A (ja) * | 2009-09-08 | 2011-03-24 | Panasonic Corp | 電子部品内蔵基板及びその製造方法とこれを用いた半導体装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005235807A (ja) | 2004-02-17 | 2005-09-02 | Murata Mfg Co Ltd | 積層型電子部品およびその製造方法 |
| JP5062248B2 (ja) * | 2007-02-27 | 2012-10-31 | ルネサスエレクトロニクス株式会社 | 磁気メモリチップ装置の製造方法 |
| JP5496445B2 (ja) | 2007-06-08 | 2014-05-21 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| US20090170241A1 (en) * | 2007-12-26 | 2009-07-02 | Stats Chippac, Ltd. | Semiconductor Device and Method of Forming the Device Using Sacrificial Carrier |
| JP5340789B2 (ja) * | 2009-04-06 | 2013-11-13 | 新光電気工業株式会社 | 電子装置及びその製造方法 |
| KR101038482B1 (ko) | 2009-07-08 | 2011-06-02 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
| KR101056156B1 (ko) | 2009-11-24 | 2011-08-11 | 삼성전기주식회사 | 인쇄회로기판 제조용 절연체 및 이를 이용한 전자소자 내장형 인쇄회로기판 제조방법 |
| JP5879030B2 (ja) * | 2010-11-16 | 2016-03-08 | 新光電気工業株式会社 | 電子部品パッケージ及びその製造方法 |
-
2011
- 2011-09-21 JP JP2011206549A patent/JP2013069807A/ja active Pending
-
2012
- 2012-09-10 US US13/607,906 patent/US9136220B2/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001156246A (ja) * | 1999-11-25 | 2001-06-08 | Nec Corp | 集積回路チップの実装構造および実装方法 |
| JP2011014944A (ja) * | 2004-12-01 | 2011-01-20 | Shinko Electric Ind Co Ltd | 電子部品実装構造体の製造方法 |
| JP2009038259A (ja) * | 2007-08-02 | 2009-02-19 | Sony Corp | 半導体モジュール及びその製造方法 |
| JP2008300854A (ja) * | 2008-07-02 | 2008-12-11 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2010186847A (ja) * | 2009-02-12 | 2010-08-26 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法、並びに電子装置 |
| JP2011018893A (ja) * | 2009-07-08 | 2011-01-27 | Samsung Electro-Mechanics Co Ltd | 絶縁体、電子素子内蔵型印刷回路基板、及び電子素子内蔵型印刷回路基板の製造方法 |
| JP2011060875A (ja) * | 2009-09-08 | 2011-03-24 | Panasonic Corp | 電子部品内蔵基板及びその製造方法とこれを用いた半導体装置 |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018085452A (ja) * | 2016-11-24 | 2018-05-31 | 株式会社ジェイデバイス | 半導体装置及びその製造方法 |
| JP7028553B2 (ja) | 2016-11-24 | 2022-03-02 | 株式会社アムコー・テクノロジー・ジャパン | 半導体装置及びその製造方法 |
| JP2021520652A (ja) * | 2018-05-18 | 2021-08-19 | ロジャーズ ジャーマニー ゲーエムベーハーRogers Germany GmbH | 電子モジュールとその製造方法 |
| JP7241163B2 (ja) | 2018-05-18 | 2023-03-16 | ロジャーズ ジャーマニー ゲーエムベーハー | 電子モジュールとその製造方法 |
| JP2023133675A (ja) * | 2022-03-14 | 2023-09-27 | 住友電気工業株式会社 | 高周波装置の製造方法 |
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