JP2012533887A - 背面放熱を伴う絶縁体上半導体 - Google Patents
背面放熱を伴う絶縁体上半導体 Download PDFInfo
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- JP2012533887A JP2012533887A JP2012520758A JP2012520758A JP2012533887A JP 2012533887 A JP2012533887 A JP 2012533887A JP 2012520758 A JP2012520758 A JP 2012520758A JP 2012520758 A JP2012520758 A JP 2012520758A JP 2012533887 A JP2012533887 A JP 2012533887A
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- heat dissipation
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Abstract
Description
本特許出願は、2009年7月15日に出願された米国仮特許出願第61/225,914号の利益を主張する。米国仮特許出願第61/225,914号の内容は、参照により本明細書に組み込まれる。
本発明の実施形態は、アクティブデバイスの生成をそのチャネルに密着する起歪材料を有するSOI構造に提供する。本発明の実施形態によって、起歪層が塗布される通常の段階よりデバイス製造工程の後の段階でこのような起歪材料の導入が可能になる。これによって、間欠的に製造する段階中に起歪層の有効性が増加する一方で、同時にSOI構造に損傷を与える危険性を低減することが可能になる。さらに、前述の利益を有するデバイスは、半導体産業において最も多く使用される製造工程に対する修正をほとんどなしで本発明によって製造可能である。これは、新規の半導体ソリューションが直面する可能性があるほとんどの場合避けることができない固定した生産費用投資の必要を回避する既存の製造工程に対する互換可能性を想定すると大きな利点である。本発明の実施形態は、背面処理の利用、SOI絶縁層の部分の可能な除去、およびSOI構造の背面上への様々な構成における起歪層の堆積を通じてこの成果を達成する。
Claims (25)
- 放熱層と、
前記放熱層の上方に位置するアクティブ層と、
前記アクティブ層の上方に位置するハンドルウエハと、を備え、
前記放熱層は、高い熱伝導性を有し、かつ電気的に絶縁する、絶縁体上半導体構造。 - 前記放熱層の下に位置する第2のハンドルウエハであって、前記第2のハンドルウエハは、基板層の上に第2の放熱層を有する、第2のハンドルウエハをさらに備え、
前記ハンドルウエハは、仮接合を介して前記アクティブ層に接合される、請求項1に記載の絶縁体上半導体構造。 - 前記放熱層と少なくとも部分的に垂直に同じ広がりをもつ絶縁層をさらに備え、
前記アクティブ層は、前記絶縁層上に配置され、
前記絶縁層は、掘られた絶縁体領域を備え、
前記放熱層は、前記掘られた絶縁体領域に配置される、請求項2に記載の絶縁体上半導体構造。 - 前記掘られた絶縁体領域は、前記アクティブ層内の金属配線の最も低い層と横方向に同じ広がりをもつ、請求項3に記載の絶縁体上半導体構造。
- 前記放熱層と少なくとも部分的に垂直に同じ広がりをもつ絶縁層をさらに備え、
前記アクティブ層は、前記絶縁層上に配置され、
前記絶縁層は、掘られた絶縁体領域を備え、
前記放熱層は、前記掘られた絶縁体領域に配置される、請求項1に記載の絶縁体上半導体構造。 - 前記掘られた絶縁体領域の第1の部分に配置された金属接点をさらに備え、
前記放熱層は、前記掘られた絶縁体領域の第2の部分に配置され、前記放熱層は、前記金属接点の一面上に配置され、
前記金属接点は、前記アクティブ層内の回路に対して電気接点として機能するように構成される、請求項5に記載の絶縁体上半導体構造。 - 前記掘られた絶縁体領域は、前記アクティブ層内の金属配線の最も低い層と横方向に同じ広がりをもつ、請求項5に記載の絶縁体上半導体構造。
- 前記掘られた絶縁体領域の第1の部分は、前記アクティブ層に位置するアクティブデバイスの一部と横方向に同じ広がりをもつ、請求項5に記載の絶縁体上半導体構造。
- 前記アクティブデバイスのチャネル領域は、前記掘られた絶縁体領域の横方向範囲外にある、請求項8に記載の絶縁体上半導体構造。
- 前記掘られた絶縁体領域の第2の部分に配置された金属接点をさらに備え、
前記放熱層は、前記掘られた絶縁体領域の前記第1の部分に配置され、前記放熱層は、前記金属接点の一面上に配置され、
前記金属接点は、前記アクティブ層内の回路に対して電気接点として機能するように構成される、請求項9に記載の絶縁体上半導体構造。 - 前記金属接点は、金属ピラー接点を備え、
前記電気接点は、情報信号を前記回路から取り付けられた回路基板に送信するように構成された、請求項10に記載の絶縁体上半導体構造。 - 熱を絶縁層の上面を横方向に横切るアクティブ層を通してチャネリングするステップと、
熱を前記アクティブ層から放熱層を通して放散するステップと、を含む絶縁体上半導体デバイスから熱を放散する方法であって、
前記アクティブ層は、前記放熱層の上方に位置し、
前記絶縁層は、前記アクティブ層上に配置され、前記絶縁層は前記放熱層と少なくとも部分的に垂直に同じ広がりをもち、前記絶縁層は掘られた絶縁体領域を含み、
前記放熱層は高い熱伝導率を有し、電気的に絶縁し、前記放熱層は前記掘られた絶縁体領域に配置される、方法。 - 前記掘られた絶縁体領域の第1の部分は、前記アクティブ層に位置するアクティブデバイスの一部と横方向に同じ広がりをもち、
前記アクティブデバイスのチャネル領域は、前記掘られた絶縁体領域の横方向範囲外にある、請求項12に記載の方法。 - 熱を前記放熱層を横方向に通って金属接点にチャネリングするステップと、
熱を前記放熱層から前記金属接点を通って放散するステップと、をさらに含み、
前記金属接点は、前記掘られた絶縁体領域の第2の部分に位置され、前記金属接点は、前記アクティブ層に位置する回路に対して電気接点として機能するように構成され、
前記放熱層は、前記掘られた絶縁体領域の前記第1の部分に配置され、前記放熱層は、前記金属接点の一面上に配置された、請求項13に記載の方法。 - 集積回路を製造する方法であって、
アクティブ回路を絶縁体上半導体ウエハのアクティブ層に形成するステップと、
基板材料を前記絶縁体上半導体ウエハの背面に配置された基板層から除去するステップと、
絶縁材料を前記絶縁体上半導体ウエハの前記背面から除去して掘られた絶縁体領域を形成するステップと、
放熱層を前記掘られた絶縁体領域上に堆積するステップと、をさらに含み、
前記放熱層は電気的に絶縁する、方法。 - 低温の熱焼きなましを使用することにより界面状態の群を不動態化するステップであって、界面状態の前記群は、前記絶縁材料を前記除去する間に形成される、ステップをさらに含み、
前記放熱層は前記絶縁材料の層からなる、請求項15に記載の方法。 - 前記放熱層は高い熱伝導性を有する、請求項15に記載の方法。
- 前記掘られた絶縁体領域は、前記絶縁体上シリコンウエハの背面全体と横方向に同じ広がりをもつ、請求項17に記載の方法。
- 金属接点を前記掘られた絶縁体領域の第1の部分に堆積するステップをさらに含み、
前記放熱層は、前記掘られた絶縁体領域の第2の部分に配置され、前記放熱層は、前記金属接点の一面上に配置され、
前記金属接点は、前記アクティブ回路に対して電気接点として機能するように構成された、請求項17に記載の方法。 - 前記掘られた絶縁体領域は、前記アクティブ層内に位置する金属配線の最も低い層と横方向に同じ広がりをもつ、請求項17に記載の方法。
- ハンドルウエハを前記アクティブ層の上面に仮接合するステップと、
第2のハンドルウエハを前記アクティブ層の下の前記絶縁体上シリコンウエハに永久接合するステップと、をさらに含み、
前記第2のハンドルウエハは、第2の放熱層を基板層の上方に有する、請求項17に記載の方法。 - 前記掘られた絶縁体領域の第1の部分は、前記アクティブ層に位置するアクティブデバイスの一部と横方向に同じ広がりをもつ、請求項17に記載の方法。
- 絶縁材料の残余部分は、前記アクティブデバイスのチャネル領域と横方向に同じ広がりをもつ、請求項22に記載の方法。
- 金属接点を前記掘られた絶縁体領域の第2の部分に堆積するステップをさらに含み、
前記放熱層は、前記掘られた絶縁体領域の第1の部分に配置され、前記放熱層は、前記金属接点の一面上に配置され、
前記金属接点は、前記アクティブ回路に対して電気接点として機能するように構成される、請求項23に記載の方法。 - 前記集積回路を構成して回路基板に取り付けるステップをさらに含み、
前記金属接点は、金属ピラー接点を含み、
前記電気接点は、情報信号を前記アクティブ回路から前記回路基板に送信するように構成された、請求項24に記載の方法。
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
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US10217822B2 (en) | 2009-07-15 | 2019-02-26 | Qualcomm Incorporated | Semiconductor-on-insulator with back side heat dissipation |
JP2014093504A (ja) * | 2012-11-07 | 2014-05-19 | Sony Corp | 半導体装置、半導体装置の製造方法、及びアンテナスイッチモジュール |
US9379239B2 (en) | 2012-11-07 | 2016-06-28 | Sony Corporation | Semiconductor device, method of manufacturing semiconductor device, and antenna switch module |
US9537005B2 (en) | 2012-11-07 | 2017-01-03 | Sony Corporation | Semiconductor device, method of manufacturing semiconductor device, and antenna switch module |
US10553550B2 (en) | 2012-11-07 | 2020-02-04 | Sony Corporation | Semiconductor device, method of manufacturing semiconductor device, and antenna switch module |
JP2017523614A (ja) * | 2014-08-06 | 2017-08-17 | クアルコム,インコーポレイテッド | 自己整合裏面特徴部を有する半導体デバイス |
JP2017537472A (ja) * | 2014-11-13 | 2017-12-14 | クアルコム,インコーポレイテッド | 裏側ひずみトポロジーを有するセミコンダクタオンインシュレータ |
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US9029201B2 (en) | 2015-05-12 |
EP2454752B1 (en) | 2015-09-09 |
CN105097712A (zh) | 2015-11-25 |
CN102576692A (zh) | 2012-07-11 |
US20120205725A1 (en) | 2012-08-16 |
EP2454752A1 (en) | 2012-05-23 |
EP2937898A1 (en) | 2015-10-28 |
CN102576692B (zh) | 2014-11-26 |
WO2011008893A1 (en) | 2011-01-20 |
CN102473683B (zh) | 2015-07-22 |
TWI538173B (zh) | 2016-06-11 |
KR20120049865A (ko) | 2012-05-17 |
TW201119014A (en) | 2011-06-01 |
TWI619235B (zh) | 2018-03-21 |
JP5801300B2 (ja) | 2015-10-28 |
US20110012199A1 (en) | 2011-01-20 |
JP2016026383A (ja) | 2016-02-12 |
US9748272B2 (en) | 2017-08-29 |
KR101758852B1 (ko) | 2017-07-17 |
TW201633515A (zh) | 2016-09-16 |
CN102473683A (zh) | 2012-05-23 |
JP6282617B2 (ja) | 2018-02-21 |
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