JP2012504820A5 - - Google Patents
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- JP2012504820A5 JP2012504820A5 JP2011530193A JP2011530193A JP2012504820A5 JP 2012504820 A5 JP2012504820 A5 JP 2012504820A5 JP 2011530193 A JP2011530193 A JP 2011530193A JP 2011530193 A JP2011530193 A JP 2011530193A JP 2012504820 A5 JP2012504820 A5 JP 2012504820A5
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Claims (10)
- メモリ・デバイス（８６０、９６０）の少なくとも１つの軟データ値を生成する方法であって、
少なくとも１つの読取値を入手するステップと、
前記入手された少なくとも１つの読取値と前記メモリ・デバイスの１つまたは複数の性能特性に基づく調整値とに基づいて前記軟データ値を生成するステップと
を含むことを特徴とする方法。 - 前記調整値は、前記入手された少なくとも１つの読取値に基づく公称値を調整し、前記調整値は、前記メモリ・デバイスの１つまたは複数の性能特性に基づくオフセット値を含む、請求項１に記載の方法。
- 前記性能特性は、耐久特性、プログラム／消去サイクルの個数、読取サイクルの個数、保持時間、温度特性、温度特性変化、プロセス・コーナー特性、セル間干渉影響、メモリ・アレイ内の位置、前記読取値がそこから入手されるワード線の位置、前記読取値がそこから入手されるページの位置、前記読取値がそこから読み取られるワード線内のページの位置、およびアグレッサ・セルのパターンのうちの１つまたは複数を含む、請求項２に記載の方法。
- 前記調整値は、セル内の異なるビット、ワード線内の異なるページ、異なるビット線、および異なる硬読取データ値のうちの１つまたは複数に関する別々の性能特性に基づく、請求項２に記載の方法。
- 前記読取値は、データ・ビット、電圧レベル、電流レベル、および抵抗レベルのうちの１つまたは複数を含む、請求項１に記載の方法。
- 前記読取値は、軟データおよび硬データのうちの１つまたは複数を含む、請求項１に記載の方法。
- 前記軟データ値は、（ｉ）１つまたは複数の対数尤度比を生成するのに使用される軟読取値および（ｉｉ）１つまたは複数の対数尤度比のうちの１つまたは複数を含む、請求項１に記載の方法。
- 前記性能特性は、１つまたは複数のパターン依存性能特性と位置固有性能特性とを含む、請求項１に記載の方法。
- メモリ・デバイスの少なくとも１つの軟データ値を生成するシステム（８００、９００）であって、
メモリと、
前記メモリに結合され、
少なくとも１つの読取値を入手し、
前記入手された少なくとも１つの読取値と前記メモリ・デバイスの１つまたは複数の性能特性に基づく調整値とに基づいて前記軟データ値を生成する
ように動作可能な少なくとも１つのプロセッサと
を含むことを特徴とするシステム。 - 前記調整値は、前記入手された少なくとも１つの読取値に基づく公称値を調整し、前記調整値は、前記メモリ・デバイスの１つまたは複数の性能特性に基づくオフセット値を含む、請求項９に記載のシステム。
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US19475108P | 2008-09-30 | 2008-09-30 | |
| US61/194,751 | 2008-09-30 | ||
| PCT/US2009/049333 WO2010002948A1 (en) | 2008-07-01 | 2009-06-30 | Methods and apparatus for soft demapping and intercell interference mitigation in flash memories |
| USPCT/US2009/049333 | 2009-06-30 | ||
| PCT/US2009/059069 WO2010039859A1 (en) | 2008-09-30 | 2009-09-30 | Methods and apparatus for soft data generation for memory devices based on performance factor adjustment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2012504820A JP2012504820A (ja) | 2012-02-23 |
| JP2012504820A5 true JP2012504820A5 (ja) | 2012-11-15 |
Family
ID=42073862
Family Applications (4)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011530194A Expired - Fee Related JP5590620B2 (ja) | 2008-09-30 | 2009-09-30 | メモリ・デバイスの軟データ生成の方法および装置 |
| JP2011530193A Pending JP2012504820A (ja) | 2008-09-30 | 2009-09-30 | 性能要因調整に基づくメモリ・デバイスの軟データ生成の方法および装置 |
| JP2011530195A Expired - Fee Related JP5535219B2 (ja) | 2008-09-30 | 2009-09-30 | 基準セルを使用する、メモリ・デバイスの軟データ生成の方法および装置 |
| JP2011530196A Expired - Fee Related JP5535220B2 (ja) | 2008-09-30 | 2009-09-30 | デコーダ性能フィードバックを使用するメモリ・デバイス用の軟データ生成の方法および装置 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011530194A Expired - Fee Related JP5590620B2 (ja) | 2008-09-30 | 2009-09-30 | メモリ・デバイスの軟データ生成の方法および装置 |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011530195A Expired - Fee Related JP5535219B2 (ja) | 2008-09-30 | 2009-09-30 | 基準セルを使用する、メモリ・デバイスの軟データ生成の方法および装置 |
| JP2011530196A Expired - Fee Related JP5535220B2 (ja) | 2008-09-30 | 2009-09-30 | デコーダ性能フィードバックを使用するメモリ・デバイス用の軟データ生成の方法および装置 |
Country Status (8)
| Country | Link |
|---|---|
| US (4) | US8830748B2 (ja) |
| EP (4) | EP2340539A1 (ja) |
| JP (4) | JP5590620B2 (ja) |
| KR (3) | KR101758192B1 (ja) |
| CN (4) | CN102203875B (ja) |
| IL (4) | IL211895A0 (ja) |
| TW (4) | TWI581269B (ja) |
| WO (4) | WO2010039859A1 (ja) |
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